# U3115E

**UNI SEMIC** · Gate Drivers · SOP-8

U3115E from UNI SEMIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low side and logic fixed supply, recommended range 9 V to 20 V (absolute maximum 20 V). |
| 2 | HIN | input | High side driver logic input, active high; logic input range is 0 to VCC and it accepts 3.3 V, 5 V and 15 V logic. |
| 3 | LIN | input | Low side driver logic input, described in the datasheet as active low; logic input range is 0 to VCC. |
| 4 | COM | power_in | Low side return; all voltage parameters in the datasheet are referenced to COM. |
| 5 | LO | output | Low side gate drive output, swinging between 0 and VCC in recommended conditions. |
| 6 | VS | power_in | High side floating supply return; recommended offset voltage range is -5 V to 350 V, with an allowable dVS/dt transient of 55 V/ns maximum. |
| 7 | HO | output | High side gate drive output referenced to VS, with output voltage between VS and VB. |
| 8 | VB | power_in | High side floating supply; recommended VB is VS + 9 V to VS + 20 V (absolute maximum 365 V); the part has an integrated bootstrap diode. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UNI SEMIC |
| Package | SOP-8 |
| Category | Motor Driver ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High side floating absolute voltage | VB | -0.3 |  | 365 | V |  | 6 |
| Low side and logic fixed supply voltage | Vcc | -0.3 |  | 20 | V |  | 6 |
| Low side output voltage | VLO | -0.3 |  |  | V |  | 6 |
| Logic input voltage (HIN & LIN) | VIN | -0.3 |  |  | V |  | 6 |
| Allowable offset supply voltage transient | dVS/dt |  |  | 55 | V/ns |  | 6 |
| Package power dissipation | PD |  |  | 0.625 | W | TA≤+25°C | 6 |
| Thermal resistance, junction to ambient | RthJA |  |  | 200 | °C/W | board mounted and still air (section note) | 6 |
| Junction temperature | TJ | -35 |  | 150 | °C |  | 6 |
| Storage temperature | TS | -55 |  | 175 | °C |  | 6 |
| Lead temperature (soldering, 10 seconds) | TL |  |  | 300 | °C | soldering, 10 seconds | 6 |
| High side floating supply offset voltage | VS | -5 |  | 350 | V |  | 6 |
| Low side output voltage | VLO | 0 |  |  | V |  | 6 |
| Low side and logic fixed supply voltage | VCC | 9 |  | 20 | V |  | 6 |
| Logic input voltage (HIN&LIN) | VIN | 0 |  |  | V |  | 6 |
| Ambient temperature | TA | -40 |  | 150 | °C |  | 6 |
| Turn-on propagation delay | ton |  | 450 | 550 | ns | VS = 0V | 7 |
| Turn-off propagation delay | toff |  | 150 | 250 | ns | VS = 90V | 7 |
| Turn-on rise time | tr |  | 50 | 75 | ns |  | 7 |
| Turn-off fall time | tf |  | 25 | 50 | ns |  | 7 |
| Deadtime, LS turn-off to HS turn-on & HS turn-on to LS turn-off | DT | 240 | 300 | 360 | ns |  | 7 |
| Delay matching, HS & LS turn-on/off | MT |  |  | 60 | ns |  | 7 |
| VCC supply under-voltage positive going threshold | VCCUV+ |  | 8.8 | 9.7 | V | VCC = VBS = VBIAS = 15V, TA = 25°C | 7 |
| VCC supply under-voltage negative going threshold | VCCUV- |  | 8.2 | 9.1 | V | VCC = VBS = VBIAS = 15V, TA = 25°C | 7 |
| Offset supply leakage current | ILK |  |  | 30 | uA | VB =VS =90V | 7 |
| Logic “1” (HO) & Logic “0” (LO) input voltage | VIH | 2.5 |  |  | V | VCC=5V to 20V | 7 |
| Logic “1” input bias current / Logic “0” input bias current | IIN- |  |  | 1 | uA | VIN=5V LIN= 0V | 7 |
| High level output voltage, VBIAS - VO | VOH |  |  | 100 | mV | Io = 0A | 7 |
| Low level output voltage, VO | VOL |  |  | 100 | mV | Io =0A | 7 |

## CAD (KiCad official)

- Symbol: `U3115E`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `u3115e-etched.step` / `u3115e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `u3115e.step` / `u3115e.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UNI SEMIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603345383816900608) (12 pp, sha256 `7d99ae5c4bac4e3e`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/u3115e-datasheet.pdf)