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README

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TXS4558RUKR

Texas Instruments · Translators, Level Shifters · WQFN-20-EP(3x3)

TXS4558RUKR from Texas Instruments, in a WQFN-20-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSIM2 power_out 1.8 V/2.95 V SIM2 supply output from the VBATT-fed LDO, enabled by EN2 and set by VSEL2 (1.8 V when low, 2.95 V when high), sourcing up to 50 mA.
2 VCC power_in 1.8-V supply for device operation and the baseband-side I/O buffers, with a recommended operating range of 1.7 V to 3.3 V.
3 VBATT power_in Battery power supply input for the integrated LDOs, specified at 2.3 V to 5.5 V.
4 VSIM1 power_out 1.8 V/2.95 V SIM1 supply output from the VBATT-fed LDO, enabled by EN1 and set by VSEL1 (1.8 V when low, 2.95 V when high), sourcing up to 50 mA.
5 SIM1CLK output Level-shifted clock output to SIM1 in the VSIM1 domain, driven from CLK when SIM1 is selected or when CLKRUN1 is high.
6 SIM1RST output Level-shifted reset output to SIM1 in the VSIM1 domain, whose level is latched at the last state when SIM1 is deselected.
7 SIM1I/O bidirectional Bidirectional level-shifted data line to SIM1 in the VSIM1 domain, becoming high impedance when SIM1 is deselected with CSEL.
8 I/O bidirectional Baseband-side bidirectional data pin in the VCC domain that connects to SIM1 or SIM2 as selected by CSEL.
9 RST input Baseband reset input in the VCC domain that is passed to the SIMxRST of the selected card.
10 CLK input Baseband clock input in the VCC domain that is level-shifted to the SIMxCLK of the selected card, or of either card when its CLKRUNx is high.
11 EN1 input Enable input for the SIM1 interface in the VCC domain that powers VSIM1 and starts the SIM1 activation sequence when driven high.
12 VSEL1 input Input in the VCC domain that selects the LDO1 output voltage, 1.8 V when low and 2.95 V when high.
13 CSEL input Input in the VCC domain that selects the active card, SIM1 when low and SIM2 when high.
14 CLKRUN1 input Input in the VCC domain that controls SIM1CLK when SIM1 is deselected, keeping the clock running when high and bringing SIM1CLK low when low.
15 CLKRUN2 input Input in the VCC domain that controls SIM2CLK when SIM2 is deselected, keeping the clock running when high and bringing SIM2CLK low when low.
16 VSEL2 input Input in the VCC domain that selects the LDO2 output voltage, 1.8 V when low and 2.95 V when high.
17 EN2 input Enable input for the SIM2 interface in the VCC domain that powers VSIM2 and starts the SIM2 activation sequence when driven high.
18 SIM2I/O bidirectional Bidirectional level-shifted data line to SIM2 in the VSIM2 domain, becoming high impedance when SIM2 is deselected with CSEL.
19 SIM2RST output Level-shifted reset output to SIM2 in the VSIM2 domain, whose level is latched at the last state when SIM2 is deselected.
20 SIM2CLK output Level-shifted clock output to SIM2 in the VSIM2 domain, driven from CLK when SIM2 is selected or when CLKRUN2 is high.
21 GND power_in Exposed center thermal pad that must be electrically connected to ground and soldered to the PCB ground plane.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-20-EP(3x3)
Category Logic
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC supply voltage VCC 1.7 3.3 V 4
High-level input voltage (max) VIH 3.3 V Applies to pins: EN1, EN2, RST, CLK, I/O, CLKRUN1, CLKRUN2, VSEL1, VSEL2, CSEL 4
Low-level input voltage (min) VIL 0 V Applies to pins: EN1, EN2, RST, CLK, I/O, CLKRUN1, CLKRUN2, VSEL1, VSEL2, CSEL 4
Input transition rise or fall rate Δt/Δv 5 ns/V 4
Operating free-air temperature TA -40 85 °C 4
VCC supply voltage range VCC -0.3 4 V 3
Input voltage range, VCC-port VI -0.5 4.6 V VCC-port 3
Input voltage range, VSIMx-port VI -0.5 4.6 V VSIMx-port 3
Input voltage range, control inputs VI -0.5 4.6 V Control inputs 3
Voltage applied to output in high-impedance or power-off state, VCC-port VO -0.5 4.6 V High-impedance or power-off state, VCC-port 3
Voltage applied to output in high-impedance or power-off state, VSIMx-port VO -0.5 4.6 V High-impedance or power-off state, VSIMx-port 3
Voltage applied to output in high-impedance or power-off state, control inputs VO -0.5 4.6 V High-impedance or power-off state, control inputs 3
Voltage applied to output in high or low state, VCC-port VO -0.5 4.6 V High or low state, VCC-port 3
Voltage applied to output in high or low state, VSIMx-port VO -0.5 4.6 V High or low state, VSIMx-port 3
Voltage applied to output in high or low state, control inputs VO -0.5 4.6 V High or low state, control inputs 3
Input clamp current IIK -50 mA VI < 0 3
Output clamp current IOK -50 mA VO < 0 3
Continuous output current IO -50 50 mA 3
Continuous current through VCCA or GND -100 100 mA 3
Storage temperature range (level translator) Tstg -65 150 °C 3
Input voltage range (LDO) VBAT -0.3 6 V 3
Output voltage range (LDO) VOUT -0.3 6 V 3
Junction temperature range TJ -55 150 °C 3
Storage temperature range (LDO) Tstg -55 150 °C 3
Low-level output voltage, SIM1_I/O open-drain VOL 0.3 V IOL = 1 mA, Open-Drain 4
Low-level output voltage, SIM2_I/O open-drain VOL 0.3 V IOL = 1 mA, Open-Drain 4
Low-level output voltage, I/O open-drain VOL 0.3 V IOL = 1 mA, Open-Drain 4
Input current, control inputs II -1 1 µA VI = EN1, EN2, CLKRUN1, CSEL, CLKRUN2, VSEL1, VSEL2; 1.7 V to 3.3 V 4
I/O ground current (ICC I/O) ICC -5 5 µA VI = VCCI, IO = 0, 1.7 V to 3.3 V 4
Input voltage (LDO) VBAT 2.3 5.5 V 4
Output voltage, Class-B mode VSIM1,2 2.85 2.95 3.05 V Class-B mode, 0 mA < ISIM1,2 < 50 mA 4
Output voltage, Class-C mode VSIM1,2 1.7 1.8 1.9 V Class-C mode, 0 mA < ISIM1,2 < 50 mA 4
Dropout voltage VDO 100 mV IOUT = 50 mA 4
Operating current IVBAT 40 50 µA VSIM1 = 2.95 V, VSIM2 = 0, ISIM1 = 0 µA 4
Shutdown current (IGND) ISHDN 1 µA VENx ≤ 0.4 V, (VSIMx + VDO) ≤ VBAT ≤ 5.5 V, TJ = 85°C 4
Power-supply rejection ratio PSRR 50 dB f = 1 kHz; VBAT = 3.15 V, VSIM1,2 = 1.8 V or 2.95 V, COUT = 1 µF, IOUT = 10 mA 4
Power-supply rejection ratio PSRR 40 dB f = 10 kHz; VBAT = 3.15 V, VSIM1,2 = 1.8 V or 2.95 V, COUT = 1 µF, IOUT = 10 mA 4
Start-up time TSTR 400 µS VSIM1,2 = 1.8 V or 3 V, IOUT = 50 mA, COUT = 1 µF 4
Operating junction temperature TJ -40 125 °C 4
I/O pull-up resistance RI/OPU 16 20 24 kΩ 5
SIM_I/O pull-up resistance RSIMPU 7.4 8 8.7 kΩ SIM enabled and selected with CSEL 5
SIMx_I/O rise/fall time (I/O) trA 1 µs VCC = 1.8 V ± 0.15 V 5
SIMx_RST rise/fall time 1 µs VCC = 1.8 V ± 0.15 V 5
SIMx_CLK rise/fall time trB 50 ns VCC = 1.8 V ± 0.15 V 5
SIMx_I/O rise/fall time 100 ns VCC = 1.8 V ± 0.15 V 5
Maximum SIMx_CLK frequency fmax 25 MHz VCC = 1.8 V ± 0.15 V 5
SIMx_CLK duty cycle Duty Cycle 40 60 % VCC = 1.8 V ± 0.15 V 5

CAD (KiCad official)

  • Symbol: TXS4558RUKR
  • Footprint: Package_DFN_QFN:UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm
  • 3D model: WQFN-20-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: txs4558rukr-etched.step / txs4558rukr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); txs4558rukr.step / txs4558rukr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 7fb7bc94abc6f554, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF