component
TXS02324RUKR
Public Made by Adomby adom
Texas Instruments Interface - Specialized, QFN-20-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TXS02324RUKR
Texas Instruments · Interface - Specialized · QFN-20-EP(3x3)
TXS02324RUKR from Texas Instruments, in a QFN-20-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SIM2RST | output | SIM2 reset output signal referenced to VSIM2 supply voltage |
| 2 | VSIM2 | power_out | LDO output supply voltage for SIM2 card, selectable to 1.8 V or 2.95 V with maximum 50 mA output current |
| 3 | VBAT | power_in | Battery power supply input with voltage range from 2.3 V to 5.5 V |
| 4 | GND | power_in | Ground connection for the device |
| 5 | VSIM1 | power_out | LDO output supply voltage for SIM1 card, selectable to 1.8 V or 2.95 V with maximum 50 mA output current |
| 6 | SIM1RST | output | SIM1 reset output signal referenced to VSIM1 supply voltage |
| 7 | SIM1IO | bidirectional | SIM1 data I/O signal referenced to VSIM1 voltage domain with open-drain output topology |
| 8 | SIM1CLK | output | SIM1 clock output signal referenced to VSIM1 supply voltage with push-pull output topology |
| 9 | SIMRST | input | UICC/SIM reset input signal from baseband processor, referenced to VDDIO |
| 10 | SIMCLK | input | UICC/SIM clock input signal from baseband processor, referenced to VDDIO |
| 11 | SIMIO | bidirectional | UICC/SIM data I/O signal between baseband and selected SIM card, referenced to VDDIO with open-drain output topology |
| 12 | VDDIO | power_in | Power supply for device logic and I/O buffers toward baseband, range 1.7 V to 3.3 V |
| 13 | SCL | input | I2C serial clock input referenced to VDDIO |
| 14 | SDA | bidirectional | I2C serial data I/O line referenced to VDDIO |
| 15 | IRQ | bidirectional | Interrupt signal to baseband referenced to VDDIO, used to set the I2C slave address |
| 16 | RSTX | input | Active-low asynchronous reset input from baseband processor, referenced to VDDIO |
| 17 | DNU | unconnected | Do not use; should not be electrically connected |
| 18 | GND | power_in | Ground connection for the device |
| 19 | SIM2CLK | output | SIM2 clock output signal referenced to VSIM2 supply voltage with push-pull output topology |
| 20 | SIM2IO | bidirectional | SIM2 data I/O signal referenced to VSIM2 voltage domain with open-drain output topology |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-20-EP(3x3) |
| Category | Interface |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TXS02324RUKR - Footprint:
Package_DFN_QFN:UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm - 3D model: QFN-20-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
txs02324rukr-etched.step/txs02324rukr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);txs02324rukr.step/txs02324rukr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
6d619ad6525c013d, retrieved 2026-10-03, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TXS02324RUKR
**Texas Instruments** · Interface - Specialized · QFN-20-EP(3x3)
TXS02324RUKR from Texas Instruments, in a QFN-20-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SIM2RST | output | SIM2 reset output signal referenced to VSIM2 supply voltage |
| 2 | VSIM2 | power_out | LDO output supply voltage for SIM2 card, selectable to 1.8 V or 2.95 V with maximum 50 mA output current |
| 3 | VBAT | power_in | Battery power supply input with voltage range from 2.3 V to 5.5 V |
| 4 | GND | power_in | Ground connection for the device |
| 5 | VSIM1 | power_out | LDO output supply voltage for SIM1 card, selectable to 1.8 V or 2.95 V with maximum 50 mA output current |
| 6 | SIM1RST | output | SIM1 reset output signal referenced to VSIM1 supply voltage |
| 7 | SIM1IO | bidirectional | SIM1 data I/O signal referenced to VSIM1 voltage domain with open-drain output topology |
| 8 | SIM1CLK | output | SIM1 clock output signal referenced to VSIM1 supply voltage with push-pull output topology |
| 9 | SIMRST | input | UICC/SIM reset input signal from baseband processor, referenced to VDDIO |
| 10 | SIMCLK | input | UICC/SIM clock input signal from baseband processor, referenced to VDDIO |
| 11 | SIMIO | bidirectional | UICC/SIM data I/O signal between baseband and selected SIM card, referenced to VDDIO with open-drain output topology |
| 12 | VDDIO | power_in | Power supply for device logic and I/O buffers toward baseband, range 1.7 V to 3.3 V |
| 13 | SCL | input | I2C serial clock input referenced to VDDIO |
| 14 | SDA | bidirectional | I2C serial data I/O line referenced to VDDIO |
| 15 | IRQ | bidirectional | Interrupt signal to baseband referenced to VDDIO, used to set the I2C slave address |
| 16 | RSTX | input | Active-low asynchronous reset input from baseband processor, referenced to VDDIO |
| 17 | DNU | unconnected | Do not use; should not be electrically connected |
| 18 | GND | power_in | Ground connection for the device |
| 19 | SIM2CLK | output | SIM2 clock output signal referenced to VSIM2 supply voltage with push-pull output topology |
| 20 | SIM2IO | bidirectional | SIM2 data I/O signal referenced to VSIM2 voltage domain with open-drain output topology |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-20-EP(3x3) |
| Category | Interface |
| Pins | 21 |
## CAD (KiCad official)
- Symbol: `TXS02324RUKR`
- Footprint: `Package_DFN_QFN:UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm`
- 3D model: QFN-20-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `txs02324rukr-etched.step` / `txs02324rukr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `txs02324rukr.step` / `txs02324rukr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/txs02324) (25 pp, sha256 `6d619ad6525c013d`, retrieved 2026-10-03, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/txs02324rukr-datasheet.pdf)