component

TX6301

Public Made by Adom

by adom

XDS LED Drivers, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tx6301: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md tx6301: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago
tx6301-etched.fit.json tx6301: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
tx6301-etched.glb tx6301: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
tx6301-etched.step tx6301: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
tx6301.glb Publish 0.1.0 · Ray 1mo ago
tx6301.kicad_mod Publish 0.1.0 · Ray 1mo ago
tx6301.kicad_sym Publish 0.1.0 · Ray 1mo ago
tx6301.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 8 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
tx6301.step Publish 0.1.0 · Ray 1mo ago

TX6301

XDS · LED Drivers · SOIC-8

TX6301 from XDS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TOFF passive Switching-frequency setting pin. An external capacitor connected to this pin sets the switching (off-time) frequency; recommended operating frequency is below 500 kHz.
2 VDD power_in Chip supply rail, internally clamped by a shunt regulator to typically 5.5 V. Fed from VIN through an external series resistor (RVDD); the internal Zener clamp current must be kept below 10 mA. UVLO turn-on at 3.2 V rising, turn-off at 2.7 V falling.
3 GND power_in Device ground reference for all internal circuitry and the sensing amplifiers.
4 EN input Chip enable; active-high. Logic high (>= 0.4 x VDD) enables the controller, logic low (<= 0.8 V) puts the part into standby (I_INQ ~200 uA). May be driven with a PWM signal for LED dimming.
5 COMP passive Loop / frequency compensation node for the internal error amplifier. Connect an external capacitor (typically 200 pF to 1 nF) to GND; larger values reduce loop bandwidth.
6 CS input Output LED current sense input. The regulation loop holds this pin at a nominal 250 mV (240-260 mV) across the sense resistor RCS, so ILED = 0.25 V / RCS.
7 DRV output Gate-drive output for the external power MOSFET. Nominal drive swing tracks VDD (~5.5 V); rise/fall times ~50 ns into 1 nF. Choose a MOSFET whose RDS(on) is fully enhanced at VGS = 5.5 V.
8 ILIM input Power-MOSFET peak-current limit sense input. Sets the cycle-by-cycle inductor peak-current limit via an external sense resistor RILIM, where ILIMIT = 0.25 V / RILIM.

Key specifications

Parameter Value
Manufacturer XDS
Package SOIC-8
Category LED-drv
Pins 8

CAD (KiCad official)

  • Symbol: TX6301
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tx6301-etched.step / tx6301-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tx6301.step / tx6301.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tx6301.step 122 KB You want the bare part, or you mark your own boards.
tx6301-etched.step 1.5 MB You want the part with TX6301 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 372 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XDS datasheet (8 pp, sha256 aade119490c082a5, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF