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Contents

README

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TX6212

XDS · LED Drivers · ESOP-8

TX6212 from XDS, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Device ground / signal return.
2 EN input Chip enable, active high. Also accepts a PWM signal for LED dimming. Logic thresholds: VIH ≥ 0.4*VDD, VIL ≤ 0.8V. Abs-max: -0.3V to VDD+0.3V.
3 COMP output Error-amplifier output / loop compensation pin. Connect an external RC network to GND to set loop bandwidth and stability. Abs-max: -0.3V to VDD+0.3V.
4 FB input Output LED current-sense feedback input. Regulates to VFB = 250 mV (240-260 mV) across the external sense resistor RFB in the LED return path; ILED = 0.25 V / RFB. Abs-max: -0.3V to VDD+0.3V.
5 SW output Drain of the internal 100V power NMOS switch. Connects to the boost inductor and rectifier. VDS max = 100 V, RDS(on) ≈ 120 mΩ at VGS = 5 V. The exposed pad (heat slug) is internally tied to SW.
6 CS input Input peak inductor-current sense input. Sets peak-current limit via external RCS to GND; over-current threshold VCS_TH = 250 mV (240-260 mV), giving IPK ≤ 0.25 V / RCS. Abs-max: -0.3V to VDD+0.3V.
7 TOFF passive Off-time programming pin. Connect a capacitor COFF to GND: TOFF = 0.51 * 150 kΩ * (COFF + 7.3 pF) + 61 ns. With no external cap, off-time defaults to ~620 ns (min). Typical COFF is 22-33 pF or larger. Abs-max: -0.3V to VDD+0.3V.
8 VDD power_in Chip supply pin fed from VIN through an external dropping resistor RVDD. Internally clamped by a VDD Zener to ~5.5 V (IVDD < 10 mA); UVLO rising = 3.2 V with 0.5 V hysteresis. Bypass with a local ceramic capacitor to GND.

Key specifications

Parameter Value
Manufacturer XDS
Package ESOP-8
Category LED-drv
Pins 8

CAD (KiCad official)

  • Symbol: TX6212
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: tx6212-etched.step / tx6212-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tx6212.step / tx6212.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XDS datasheet (8 pp, sha256 5bda38f63012e93f, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF