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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs tx6211: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tx6211: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md tx6211: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
tx6211-etched.fit.json tx6211: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tx6211-etched.glb tx6211: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tx6211-etched.step tx6211: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tx6211.glb Publish 0.1.0 · Ray
tx6211.kicad_mod Publish 0.1.0 · Ray
tx6211.kicad_sym Publish 0.1.0 · Ray
tx6211.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tx6211.step Publish 0.1.0 · Ray

TX6211

XDS · LED Drivers · SOP-8

TX6211 from XDS, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Device ground / power return (电源地).
2 EN input Enable input, active high. Also accepts a PWM signal for LED dimming. Logic thresholds: HEN ≥ 0.4×VDD, LEN ≤ 0.8V.
3 COMP passive Loop / frequency compensation node. Connect a compensation capacitor (and optional series RC) to GND to set the control-loop response.
4 IFB input Output LED current feedback sense input. Regulated to VIFB ≈ 250mV (min 240mV / max 260mV) across the LED-current sense resistor for constant-current control.
5 DRV output Gate-drive output for the external N-channel power MOSFET. Rise/fall time ≤ 50 ns into a 500 pF load; max voltage VDD + 0.3V.
6 ICS input Input / inductor peak-current sense input. Used for cycle-by-cycle peak current control and input over-current protection; VCS_TH ≈ 250 mV (240-260 mV).
7 TOFF passive Fixed off-time programming pin. Connect a capacitor C1 (typ. 22-47 pF) to GND to set TOFF = 0.51 × 150 kΩ × (C1 + 7.3 pF) + TD (TD ≈ 61 ns). Minimum TOFF ≈ 620 ns with no external cap.
8 VDD power_in Chip supply input, internally clamped by a Zener regulator to ~5.5V (IVDD < 10 mA). UVLO rising ≈ 3.2V with 0.5V hysteresis. Fed from VIN through an external dropping resistor RVDD.

Key specifications

Parameter Value
Manufacturer XDS
Package SOP-8
Category LED-drv
Pins 8

CAD (KiCad official)

  • Symbol: TX6211
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: tx6211-etched.step / tx6211-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tx6211.step / tx6211.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tx6211.step 122 KB You want the bare part, or you mark your own boards.
tx6211-etched.step 1.3 MB You want the part with TX6211 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 326 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XDS datasheet (8 pp, sha256 d69a9c37293b6897, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF