component
TX4132L
Public Made by Adomby adom
XDS DC-DC Converters, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 11d ago |
| viewers | 11d ago |
| package.json | 11d ago |
| page.json | 11d ago |
| README.md | 11d ago |
| tx4132l-etched.glb | 11d ago |
| tx4132l-etched.step | 11d ago |
| tx4132l-hero.glb | 11d ago |
| tx4132l-hero.overlay.json | 11d ago |
| tx4132l.glb | 11d ago |
| tx4132l.kicad_mod | 11d ago |
| tx4132l.kicad_sym | 11d ago |
| tx4132l.lbr | 11d ago |
| tx4132l.step | 11d ago |
TX4132L
XDS · DC-DC Converters · SOP-8-EP
TX4132L from XDS, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Internal MOS drain and input supply pin; VIN maximum voltage is 60 V, with the stated input range up to 55 V. |
| 2 | VDD | power_in | Chip supply pin; VDD clamp voltage is 33 V, with undervoltage protection turning on at 4.5 V rising and off at 3 V falling. |
| 3 | FB1 | input | Positive output feedback voltage sense input; the FB1-FB2 reference voltage VFB is 369-391 mV (380 mV typical), and FB1/FB2/VCC/VSEN pin voltage is limited to -0.3 to 6 V. |
| 4 | FB2 | input | Negative output feedback voltage sense input; FB1/FB2/VCC/VSEN pin voltage is limited to -0.3 to 6 V. |
| 5 | VCC | power_out | Internal 5 V LDO output that requires an external capacitor; VCC voltage is specified at 5.5 V. |
| 6 | GND | power_in | Chip ground pin; output current limit resistor from VSEN to GND sets the maximum output current. |
| 7 | VSEN | input | Inductor current sense pin; the sense voltage VCS is 145-155 mV (150 mV typical) and the pin voltage is limited to -0.3 to 6 V. |
| 8 | Heatsink (EP) | power_in | Exposed heatsink pad, internally connected to the VIN pin. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XDS |
| Package | SOP-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN maximum voltage | VIN | 60 | V | 4 | |||
| VDD maximum voltage | VDD | 33 | V | 4 | |||
| FB1, FB2, VCC, VSEN, VSEND pin voltage | Vmax | -0.3 | 6 | V | 4 | ||
| ESOP8 package maximum power dissipation | PESOP8 | 1 | W | 4 | |||
| Operating temperature range | TA | -40 | 85 | ℃ | 4 | ||
| Storage temperature range | TSTG | -40 | 120 | ℃ | 4 | ||
| ESD withstand voltage (human body model) | VESD | 2000 | V | human body model | 4 | ||
| VDD clamp voltage | VDD | 33 | V | IVDDvlOmA | 5 | ||
| Undervoltage protection turn-on threshold | VDD_ON | 4.5 | V | VDD rising | 5 | ||
| Undervoltage protection turn-off threshold | VDD_OFF | 3 | V | VDD falling | 5 | ||
| Operating current | IOP | 1 | mA | DRV load 1nF capacitor | 5 | ||
| Startup current | STARTUP | 40 | 100 | uA | VDD=5V | 5 | |
| Overcurrent protection threshold | VCS_LMT | 300 | mV | 5 | |||
| VSEN voltage drop | VCS | 145 | 150 | 155 | mV | 5 | |
| FB1, FB2 voltage difference | VFB | 369 | 380 | 391 | mV | 5 | |
| Switching frequency | FS | 140 | KHz | 5 | |||
| MOS drain-source breakdown voltage | VDS | 60 | V | 5 | |||
| MOS on-resistance | RDSON | 70 | mQ | 5 | |||
| Overtemperature protection threshold | OTP_TH | 150 | ℃ | 5 | |||
| Overtemperature protection hysteresis | OTP_HYS | 25 | ℃ | 5 | |||
| VCC LDO output voltage | VCC | 5.5 | V | 5 |
CAD (KiCad official)
- Symbol:
TX4132L - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
tx4132l-etched.step/tx4132l-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tx4132l.step/tx4132l.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XDS datasheet (9 pp, sha256
6baaddcd8c9c9c76, retrieved 2026-10-28, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).