# TX4120XH

**XDS** · DC-DC Converters · SOT-23-6

TX4120XH from XDS, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Feedback input. Senses the output voltage via an external resistor divider between VOUT and GND. High-impedance sensitive node; route away from SW and BST. When CS is floating or tied to VOUT, FB is connected directly to VOUT because the internal divider sets the output voltage. |
| 2 | GND | power_in | Ground return for the IC and the low-side power switch. |
| 3 | VIN | power_in | Supply input to the IC. Accepts 4.5V to 36V (recommended 6.5V-30V, absolute max 36V; 33V input OVP). Bypass with a large bulk capacitor and at least one 0.1µF ceramic capacitor close to the VIN and GND pins to suppress input noise. |
| 4 | SW | output | Power switch node. Connects to the switching node of the external inductor (junction of the high-side and low-side integrated MOSFETs). Absolute max range −1V to VIN+0.3V. |
| 5 | BST | passive | Bootstrap pin for the high-side gate driver. Connect a 0.1µF (or larger) capacitor between SW and BST to supply the high-side MOSFET gate driver. Absolute max VBST−VSW = 6V. |
| 6 | CS | input | Current-sense input and mode-select pin. Connect a 10mΩ-100mΩ sense resistor between CS and GND to program the output current limit and enable CC-loop operation (Mode 1); the R1 in Figure 1 can be used for programmed line-drop compensation. Alternatively tie CS to VOUT or leave floating (Mode 0) to disable the CC loop and line-drop compensation - the internal divider then automatically sets VOUT to ~5.1V for minimum external components. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | XDS |
| Package | SOT-23-6 |
| Category | PMIC |
| Pins | 6 |

## Ordering variants

Same part, different packaging or reel option.

- `TX4120xH`

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN to GND |  | -0.3 |  | 36 | V |  | 3 |
| VEN to GND |  | -0.3 |  | 6 | V |  | 3 |
| VCS to GND |  | -0.3 |  | 6 | V |  | 3 |
| VFB to GND |  | -0.3 |  | 6 | V |  | 3 |
| VLED to GND |  | -0.3 |  | 6 | V |  | 3 |
| VBST to VSW |  | -0.3 |  | 6 | V |  | 3 |
| VSW to GND |  | -1 |  |  | V |  | 3 |
| TST 储存温度范围 | TST | -65 |  | 150 | °C |  | 3 |
| TJ 结温 | TJ |  |  | 160 | °C |  | 3 |
| TL 引线温度 | TL |  |  | 260 | °C |  | 3 |
| HBM 人体模型 | VESD | 2 |  | 4 | kV | HBM | 3 |
| CDM 充电器设备型号 | VESD |  |  | 500 | V | CDM | 3 |
| VIN to GND |  | 6.5 |  | 30 | V |  | 3 |
| FB |  | -0.3 |  | 3.3 | V |  | 3 |
| 输出电压 VOUT | VOUT | 0.5 |  |  | V |  | 3 |
| 输出电流 IOUT | IOUT | 0 |  | 1 | A |  | 3 |
| 工作结温范围 TJ | TJ | -40 |  | 125 | °C |  | 3 |
| 高边开关漏电流 | Ileak_sw |  | 0 | 10 | µA | VEN = 0V, VSW= 0V | 4 |
| 高边开关导通电阻 | RDS(ON)_H |  |  | 250 | mΩ | IOUT = 1A, VOUT = 3.3V | 4 |
| 低侧开关导通电阻 | RDS(ON)_L |  |  | 140 | mΩ | IOUT = 1A, VOUT = 3.3V | 4 |
| 启动时的最小输入电压 | VUVLO_up | 4.5 |  |  | V |  | 4 |
| 最大占空比 | Dmax |  |  | 98 | % | 注 4（由设计保证，未经生产测试） | 4 |
| 最短准点时间 | Ton |  |  | 100 | ns | 注 4（由设计保证，未经生产测试） | 4 |
| 欠压锁定下降阈值 | VUVLO_down |  | 4.3 |  | V |  | 4 |
| 欠压锁定迟滞 | VUVLO_hys |  | 0.3 |  |  |  | 4 |
| 工作静态电流 | IQ-NONSW |  | 1 |  | mA | VFB =0.9V | 4 |
| 降压振荡器频率 | Foscb |  | 500 |  | kHz |  | 4 |
| 反馈电压 | VFB |  | 0.9 |  | V | 6.5V ≤ VIN ≤ 33V | 4 |
| 开关电流上限 | Iocl_hs |  | 3.5 |  | A | 最小占空比 | 4 |
| 下开关电流限制 | Iocl_ls |  | 1 |  | A | 从漏到源 | 4 |
| 输入过压保护 | Vinovp |  | 33 |  | V |  | 4 |
| 热关断 | Thsd |  | 155 |  | °C | 注 4（由设计保证，未经生产测试） | 4 |
| 热关断滞后 | Thsdhys |  | 15 |  | °C | 注 4（由设计保证，未经生产测试） | 4 |
| 结到环境热阻 | θJA |  | 110 |  | °C/W | 在大约 1 英寸见方的 1 盎司铜上测量（注 3） | 3 |
| 结壳热阻 | θJC |  | 45 |  | °C/W |  | 3 |

## CAD (KiCad official)

- Symbol: `TX4120XH`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `tx4120xh-etched.step` / `tx4120xh-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tx4120xh.step` / `tx4120xh.glb` are the bare package body.

## 3D model downloads

Two STEP files. Same geometry, different body top:

| File | Size | Use it when |
|---|---|---|
| [`tx4120xh.step`](tx4120xh.step) | 97 KB | You want the bare part, or you mark your own boards. |
| [`tx4120xh-etched.step`](tx4120xh-etched.step) | 1.3 MB | You want the part with `TX4120XH` already on it. |

The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 354 faces against 117 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [XDS datasheet](docs/tx4120xh-datasheet.pdf) (10 pp, sha256 `69eb4c5e6d0742b5`, retrieved 2026-08-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tx4120xh-datasheet.pdf)