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TVP5150AM1PBSR

Texas Instruments · Video Interface ICs · TQFP-32(5x5)

TVP5150AM1PBSR from Texas Instruments, in a TQFP-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AIP1A input Analog video input with maximum range 0-0.75 VPP requiring 0.1-µF series capacitor coupling.
2 AIP1B input Analog video input with maximum range 0-0.75 VPP requiring 0.1-µF series capacitor coupling.
3 PLL_AGND power_in PLL ground connection.
4 PLL_AVDD power_in PLL analog supply at 1.8 V.
5 XTAL1/OSC input 14.31818-MHz external clock reference input or crystal input.
6 XTAL2 output External clock reference output or crystal output.
7 AGND power_in Analog substrate ground.
8 RESETB input Active-low reset input functional only when PDN is high.
9 SCLK output System clock output at 2× pixel clock frequency.
10 IO_DVDD power_in 3.3-V digital output supply.
11 YOUT7/I2CSEL bidirectional Dual-function pin as YOUT7 (MSB output) or I2C address select input sampled at reset.
12 YOUT6 output Video output bit 6 in YCbCr or ITU-R BT.656 format.
13 YOUT5 output Video output bit 5 in YCbCr or ITU-R BT.656 format.
14 YOUT4 output Video output bit 4 in YCbCr or ITU-R BT.656 format.
15 YOUT3 output Video output bit 3 in YCbCr or ITU-R BT.656 format.
16 YOUT2 output Video output bit 2 in YCbCr or ITU-R BT.656 format.
17 YOUT1 output Video output bit 1 in YCbCr or ITU-R BT.656 format.
18 YOUT0 output Video output bit 0 (LSB) in YCbCr or ITU-R BT.656 format.
19 DGND power_in Digital ground.
20 DVDD power_in 1.8-V digital supply.
21 SCL bidirectional I2C serial clock (open-drain) operating up to 400 kbit/s with 400 pF bus capacitance limit.
22 SDA bidirectional I2C serial data (open-drain) operating up to 400 kbit/s with 400 pF bus capacitance limit.
23 FID/GLCO output Selectable field ID output or 23-bit genlock control serial output.
24 VSYNC/PALI output Selectable vertical sync output or PAL line indicator output.
25 HSYNC output Horizontal sync output with programmable start position via register 16h.
26 AVID output Active video indicator output high during active video; vertical blanking toggles controlled by register 12h.
27 INTREQ/GPCL/VBLK output Selectable interrupt request, general-purpose control, or vertical blanking output requiring external resistor.
28 PDN input Power-down input (active low) that puts decoder in <1 mW standby while preserving registers.
29 REFP output ADC reference positive output requiring 1-µF capacitor to ground and optionally to REFM.
30 REFM output ADC reference negative output requiring 1-µF capacitor to ground and optionally to REFP.
31 CH_AVDD power_in 1.8-V analog core supply.
32 CH_AGND power_in Analog core ground.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFP-32(5x5)
Category Interface
Pins 32

CAD (KiCad official)

  • Symbol: TVP5150AM1PBSR
  • Footprint: Package_QFP:TQFP-32_5x5mm_P0.5mm
  • 3D model: TQFP-32(5x5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.1 mm nominal TQFP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tvp5150am1pbsr-etched.step / tvp5150am1pbsr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tvp5150am1pbsr.step / tvp5150am1pbsr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (87 pp, sha256 0d57650c898dc79c, retrieved 2026-10-01, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF