# TUSB8041RGCR

**Texas Instruments** · USB Converters · QFN-64-EP(9x9)

TUSB8041RGCR from Texas Instruments, in a QFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | USB_DP_DN1 | bidirectional | USB High-speed differential transceiver (positive) for downstream port 1. |
| 2 | USB_DM_DN1 | bidirectional | USB High-speed differential transceiver (negative) for downstream port 1. |
| 3 | USB_SSTXP_DN1 | output | USB SuperSpeed transmitter differential pair (positive) for downstream port 1. |
| 4 | USB_SSTXM_DN1 | output | USB SuperSpeed transmitter differential pair (negative) for downstream port 1. |
| 5 | VDD | power_in | 1.1-V power rail. |
| 6 | USB_SSRXP_DN1 | input | USB SuperSpeed receiver differential pair (positive) for downstream port 1. |
| 7 | USB_SSRXM_DN1 | input | USB SuperSpeed receiver differential pair (negative) for downstream port 1. |
| 8 | VDD | power_in | 1.1-V power rail. |
| 9 | USB_DP_DN2 | bidirectional | USB High-speed differential transceiver (positive) for downstream port 2. |
| 10 | USB_DM_DN2 | bidirectional | USB High-speed differential transceiver (negative) for downstream port 2. |
| 11 | USB_SSTXP_DN2 | output | USB SuperSpeed transmitter differential pair (positive) for downstream port 2. |
| 12 | USB_SSTXM_DN2 | output | USB SuperSpeed transmitter differential pair (negative) for downstream port 2. |
| 13 | VDD | power_in | 1.1-V power rail. |
| 14 | USB_SSRXP_DN2 | input | USB SuperSpeed receiver differential pair (positive) for downstream port 2. |
| 15 | USB_SSRXM_DN2 | input | USB SuperSpeed receiver differential pair (negative) for downstream port 2. |
| 16 | VDD33 | power_in | 3.3-V power rail. |
| 17 | USB_DP_DN3 | bidirectional | USB High-speed differential transceiver (positive) for downstream port 3. |
| 18 | USB_DM_DN3 | bidirectional | USB High-speed differential transceiver (negative) for downstream port 3. |
| 19 | USB_SSTXP_DN3 | output | USB SuperSpeed transmitter differential pair (positive) for downstream port 3. |
| 20 | USB_SSTXM_DN3 | output | USB SuperSpeed transmitter differential pair (negative) for downstream port 3. |
| 21 | VDD | power_in | 1.1-V power rail. |
| 22 | USB_SSRXP_DN3 | input | USB SuperSpeed receiver differential pair (positive) for downstream port 3. |
| 23 | USB_SSRXM_DN3 | input | USB SuperSpeed receiver differential pair (negative) for downstream port 3. |
| 24 | USB_DP_DN4 | bidirectional | USB High-speed differential transceiver (positive) for downstream port 4. |
| 25 | USB_DM_DN4 | bidirectional | USB High-speed differential transceiver (negative) for downstream port 4. |
| 26 | USB_SSTXP_DN4 | output | USB SuperSpeed transmitter differential pair (positive) for downstream port 4. |
| 27 | USB_SSTXM_DN4 | output | USB SuperSpeed transmitter differential pair (negative) for downstream port 4. |
| 28 | VDD | power_in | 1.1-V power rail. |
| 29 | USB_SSRXP_DN4 | input | USB SuperSpeed receiver differential pair (positive) for downstream port 4. |
| 30 | USB_SSRXM_DN4 | input | USB SuperSpeed receiver differential pair (negative) for downstream port 4. |
| 31 | VDD | power_in | 1.1-V power rail. |
| 32 | PWRCTL4/BATEN4 | bidirectional | USB Port 4 power-on control for the downstream power switch, sampled at reset de-assertion to set battery charging support for Port 4 (0 = not supported, 1 = supported); internal pull-down. |
| 33 | PWRCTL3/BATEN3 | bidirectional | USB Port 3 power-on control for the downstream power switch, sampled at reset de-assertion to set battery charging support for Port 3 (0 = not supported, 1 = supported); internal pull-down. |
| 34 | VDD33 | power_in | 3.3-V power rail. |
| 35 | PWRCTL2/BATEN2 | bidirectional | USB Port 2 power-on control for the downstream power switch, sampled at reset de-assertion to set battery charging support for Port 2 (0 = not supported, 1 = supported); internal pull-down. |
| 36 | PWRCTL1/BATEN1 | bidirectional | USB Port 1 power-on control for the downstream power switch, sampled at reset de-assertion to set battery charging support for Port 1 (0 = not supported, 1 = supported); internal pull-down. |
| 37 | SDA/SMBDAT | bidirectional | I2C data / SMBus data, function set by SMBUSz; internal pull-down; can be left unconnected if external interface not implemented. |
| 38 | SCL/SMBCLK | bidirectional | I2C clock / SMBus clock, function set by SMBUSz; internal pull-down; can be left unconnected if external interface not implemented. |
| 39 | SMBUSz/SS_SUSPEND | bidirectional | I2C/SMBus mode select sampled at reset de-assertion (1 = I2C, 0 = SMBus), then SuperSpeed suspend status of the upstream port; internal pull-up. |
| 40 | FULLPWRMGMTz/SMBA1/SS_UP | bidirectional | Full power management enable (0 = power switching and over-current inputs supported, 1 = not supported) sampled at reset, SMBus address bit 1, then SuperSpeed upstream connection status; internal pull-down. |
| 41 | PWRCTL_POL | bidirectional | Power control polarity of PWRCTL[4:1] sampled at reset de-assertion (0 = active low, 1 = active high); internal pull-up. |
| 42 | GANGED/SMBA2/HS_UP | bidirectional | Ganged operation enable (0 = individual power control, 1 = ganged) sampled at reset, SMBus address bit 2, then High-speed upstream connection status; internal pull-down. |
| 43 | OVERCUR4z | input | USB Port 4 over-current detection input, active low (0 = over-current event occurred); internal pull-up; may be left unconnected if power management is not implemented. |
| 44 | OVERCUR3z | input | USB Port 3 over-current detection input, active low (0 = over-current event occurred); internal pull-up; may be left unconnected if power management is not implemented. |
| 45 | AUTOENz/HS_SUSPEND | bidirectional | Automatic charge mode enable sampled at reset (0 = automatic mode enabled, 1 = disabled), then High-speed suspend status of the upstream port; internal pull-up. |
| 46 | OVERCUR1z | input | USB Port 1 over-current detection input, active low (0 = over-current event occurred); internal pull-up; may be left unconnected if power management is not implemented. |
| 47 | OVERCUR2z | input | USB Port 2 over-current detection input, active low (0 = over-current event occurred); internal pull-up; may be left unconnected if power management is not implemented. |
| 48 | USB_VBUS | input | USB upstream port power monitor; connect to VBUS through a 90.9-kΩ ±1% resistor and to ground through a 10-kΩ ±1% resistor. |
| 49 | TEST | input | Reserved for factory test; internal pull-down. |
| 50 | GRSTz | input | Global power reset, active low; brings all internal registers to default states and device is nonfunctional while asserted; internal pull-up. |
| 51 | VDD | power_in | 1.1-V power rail. |
| 52 | VDD33 | power_in | 3.3-V power rail. |
| 53 | USB_DP_UP | bidirectional | USB High-speed differential transceiver (positive) for the upstream port. |
| 54 | USB_DM_UP | bidirectional | USB High-speed differential transceiver (negative) for the upstream port. |
| 55 | USB_SSTXP_UP | output | USB SuperSpeed transmitter differential pair (positive) for the upstream port. |
| 56 | USB_SSTXM_UP | output | USB SuperSpeed transmitter differential pair (negative) for the upstream port. |
| 57 | VDD | power_in | 1.1-V power rail. |
| 58 | USB_SSRXP_UP | input | USB SuperSpeed receiver differential pair (positive) for the upstream port. |
| 59 | USB_SSRXM_UP | input | USB SuperSpeed receiver differential pair (negative) for the upstream port. |
| 60 | NC | unconnected | No connect, leave floating. |
| 61 | XO | output | Crystal output for the internal oscillator; may be left unconnected if XI is driven by an external oscillator; 1-MΩ feedback resistor required between XI and XO with a crystal. |
| 62 | XI | input | Crystal input for the internal oscillator or external oscillator drive; 1-MΩ feedback resistor required between XI and XO with a crystal. |
| 63 | VDD33 | power_in | 3.3-V power rail. |
| 64 | USB_R1 | input | Precision resistor reference; connect a 9.53-kΩ ±1% resistor between USB_R1 and GND. |
| 65 | VSS | power_in | Ground; thermal pad must be connected to ground. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-64-EP(9x9) |
| Category | Interface |
| Pins | 65 |

## CAD (KiCad official)

- Symbol: `TUSB8041RGCR`
- Footprint: `Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm`
- 3D model: QFN-64-EP(9x9) (KiCad packages3D, STEP)
- 3D model files: `tusb8041rgcr-etched.step` / `tusb8041rgcr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tusb8041rgcr.step` / `tusb8041rgcr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tusb8041) (50 pp, sha256 `fbab35d6db2e54aa`, retrieved 2026-10-07, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tusb8041rgcr-datasheet.pdf)