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Contents

README

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TUSB2046BVF

Texas Instruments · USB Converters · LQFP-32(7x7)

TUSB2046BVF from Texas Instruments, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DP0 bidirectional Root port USB differential data plus; DP0 paired with DM0 forms the upstream USB port.
2 DM0 bidirectional Root port USB differential data minus; DM0 paired with DP0 forms the upstream USB port.
3 VCC power_in 3.3-V supply voltage; 3.0 V to 3.6 V is the recommended range for TUSB2046B.
4 RESET input Active-low TTL input with hysteresis that must be asserted at power-up; a reset pulse of 100 µs to 1 ms is recommended after VCC reaches 90%, and the clock must be active during the last 60 µs of the reset window.
5 EECLK output EEPROM serial clock, a 3-state output with a 100-µA internal pulldown when EXTMEM is low; it must be left floating when EXTMEM is high.
6 EEDATA/GANGED bidirectional When EXTMEM is high it selects ganged or per-port overcurrent detection; when EXTMEM is low it is the EEPROM serial data I/O with a 100-µA internal pulldown; it is a TTL input that must not change dynamically during operation.
7 GND power_in Ground; must be tied to ground for proper operation.
8 BUSPWR input Power source indicator: pull to 3.3 V for bus-powered mode or pull low for self-powered mode; must not change dynamically during operation.
9 PWRON1 output Active-low push-pull power-on/off control output; the external power switch must accept 3.3-V inputs because the output cannot drive 5-V signals.
10 OVRCUR1 input Active-low overcurrent input with noise filtering; in ganged mode all OVRCUR terminals must be tied together.
11 DM1 bidirectional Downstream USB differential data minus, paired with DP1 for downstream port 1.
12 DP1 bidirectional Downstream USB differential data plus, paired with DM1 for downstream port 1.
13 PWRON2 output Active-low push-pull power-on/off control output for downstream port 2; the external power switch must accept 3.3-V inputs.
14 OVRCUR2 input Active-low overcurrent input for downstream port 2 with noise filtering; in ganged mode all OVRCUR terminals must be tied together.
15 DM2 bidirectional Downstream USB differential data minus, paired with DP2 for downstream port 2.
16 DP2 bidirectional Downstream USB differential data plus, paired with DM2 for downstream port 2.
17 PWRON3 output Active-low push-pull power-on/off control output for downstream port 3; the external power switch must accept 3.3-V inputs.
18 OVRCUR3 input Active-low overcurrent input for downstream port 3 with noise filtering; in ganged mode all OVRCUR terminals must be tied together.
19 DM3 bidirectional Downstream USB differential data minus, paired with DP3 for downstream port 3.
20 DP3 bidirectional Downstream USB differential data plus, paired with DM3 for downstream port 3.
21 PWRON4 output Active-low push-pull power-on/off control output for downstream port 4; the external power switch must accept 3.3-V inputs.
22 OVRCUR4 input Active-low overcurrent input for downstream port 4 with noise filtering; in ganged mode all OVRCUR terminals must be tied together.
23 DM4 bidirectional Downstream USB differential data minus, paired with DP4 for downstream port 4.
24 DP4 bidirectional Downstream USB differential data plus, paired with DM4 for downstream port 4.
25 VCC power_in 3.3-V supply voltage; 3.0 V to 3.6 V is the recommended range for TUSB2046B.
26 EXTMEM input When high, disables the serial EEPROM interface; when low, pins 5 and 6 act as the EEPROM clock and data terminals.
27 TSTPLL/48MCLK bidirectional Production test terminal that must be tied to ground for normal 6-MHz operation; a 48-MHz clock source (no crystal) may be connected here for 48-MHz input clock operation.
28 GND power_in Ground; must be tied to ground for proper operation.
29 XTAL2 output 6-MHz crystal output; this terminal must be left open when an oscillator drives XTAL1.
30 XTAL1 input 6-MHz crystal input with 50% duty cycle that feeds the internal PLL; when driven by an oscillator the TTL output must not exceed 3.6 V.
31 TSTMODE input Test/mode terminal that must be tied to ground for normal 6-MHz operation or to 3.3-V VCC for 48-MHz operation.
32 SUSPND output Active-high suspend status output for external logic power-down; it is high during suspend and low during normal operation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-32(7x7)
Category Interface
Pins 32

CAD (KiCad official)

  • Symbol: TUSB2046BVF
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: tusb2046bvf-etched.step / tusb2046bvf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tusb2046bvf.step / tusb2046bvf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 eaa20027fc3dde2d, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF