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TUSB2046BIRHBTG4

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Texas Instruments USB Converters, VQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TUSB2046BIRHBTG4

Texas Instruments · USB Converters · VQFN-32(5x5)

TUSB2046BIRHBTG4 from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DP0 bidirectional Root port USB differential data plus; DP0 paired with DM0 forms the upstream USB port.
2 DM0 bidirectional Root port USB differential data minus; DM0 paired with DP0 forms the upstream USB port.
3 VCC power_in 3.3-V supply voltage; recommended range is 3.3 V to 3.6 V for TUSB2046BI/TUSB2046I (3 V to 3.6 V for TUSB2046B).
4 RESET input Active-low TTL input with hysteresis that must be asserted at power-up; a 100 µs to 1 ms reset pulse is recommended after VCC reaches 90%, and the clock must be active during the last 60 µs of the reset window.
5 EECLK tri_state EEPROM serial clock 3-state output with a 100-µA internal pulldown when EXTMEM is low; when EXTMEM is high the terminal is disabled and must be left unconnected.
6 EEDATA/GANGED bidirectional When EXTMEM is high it selects ganged or per-port overcurrent detection; when EXTMEM is low it is the EEPROM serial data I/O with a 100-µA internal pulldown, and as a standard TTL input it must not change dynamically during operation.
7 GND power_in Ground terminal that must be tied to ground for proper operation.
8 BUSPWR input Active-high power source indicator that must be pulled to 3.3 V for bus-powered mode or pulled low for self-powered mode, and must not change dynamically during operation.
9 PWRON1 output Active-low push-pull power-on/off control for downstream port 1; external power switches must accept 3.3-V inputs because the output cannot drive 5-V signals.
10 OVRCUR1 input Active-low overcurrent input with noise filtering for downstream port 1; in ganged mode all OVRCUR terminals must be tied together.
11 DM1 bidirectional Downstream port 1 USB differential data minus, paired with DP1.
12 DP1 bidirectional Downstream port 1 USB differential data plus, paired with DM1.
13 PWRON2 output Active-low push-pull power-on/off control for downstream port 2; external power switches must accept 3.3-V inputs because the output cannot drive 5-V signals.
14 OVRCUR2 input Active-low overcurrent input with noise filtering for downstream port 2; in ganged mode all OVRCUR terminals must be tied together.
15 DM2 bidirectional Downstream port 2 USB differential data minus, paired with DP2.
16 DP2 bidirectional Downstream port 2 USB differential data plus, paired with DM2.
17 PWRON3 output Active-low push-pull power-on/off control for downstream port 3; external power switches must accept 3.3-V inputs because the output cannot drive 5-V signals.
18 OVRCUR3 input Active-low overcurrent input with noise filtering for downstream port 3; in ganged mode all OVRCUR terminals must be tied together.
19 DM3 bidirectional Downstream port 3 USB differential data minus, paired with DP3.
20 DP3 bidirectional Downstream port 3 USB differential data plus, paired with DM3.
21 PWRON4 output Active-low push-pull power-on/off control for downstream port 4; external power switches must accept 3.3-V inputs because the output cannot drive 5-V signals.
22 OVRCUR4 input Active-low overcurrent input with noise filtering for downstream port 4; in ganged mode all OVRCUR terminals must be tied together.
23 DM4 bidirectional Downstream port 4 USB differential data minus, paired with DP4.
24 DP4 bidirectional Downstream port 4 USB differential data plus, paired with DM4.
25 VCC power_in 3.3-V supply voltage; recommended range is 3.3 V to 3.6 V for TUSB2046BI/TUSB2046I (3 V to 3.6 V for TUSB2046B).
26 EXTMEM input When high, the serial EEPROM interface is disabled; when low, pins 5 and 6 become the EEPROM clock and data terminals.
27 TSTPLL/48MCLK bidirectional Test terminal that must be tied to ground for normal 6-MHz operation; for 48-MHz operation a 48-MHz clock source (no crystal) can be connected to this input.
28 GND power_in Ground terminal that must be tied to ground for proper operation.
29 XTAL2 output 6-MHz crystal output that must be left open when an oscillator drives XTAL1.
30 XTAL1 input 6-MHz crystal or oscillator input with 50% duty cycle, from which the internal PLL generates the 48-MHz and 12-MHz clocks; an oscillator TTL output must not exceed 3.6 V.
31 TSTMODE input Test/mode terminal that must be tied to ground for normal 6-MHz operation or to 3.3-V VCC for 48-MHz operation.
32 SUSPND output Active-high suspend status output that is high during suspend mode and low during normal operation.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-32(5x5)
Category Interface
Pins 33

CAD (KiCad official)

  • Symbol: TUSB2046BIRHBTG4
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: tusb2046birhbtg4-etched.step / tusb2046birhbtg4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tusb2046birhbtg4.step / tusb2046birhbtg4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 706c3aa2802a6f58, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF