component
TSZ122IDT
Public Made by Adomby adom
STMicroelectronics Precision OpAmps, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownTSZ122IDT
STMicroelectronics · Precision OpAmps · SOIC-8
TSZ122IDT from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT1 | output | Output of amplifier 1, rail-to-rail, swinging to within 30 mV max of the rails with a 10 kΩ load to VCC/2. |
| 2 | IN1- | input | Inverting input of amplifier 1; input current must be limited to 10 mA by a series resistor. |
| 3 | IN1+ | input | Non-inverting input of amplifier 1; common-mode range is (VCC-) - 0.1 V to (VCC+) + 0.1 V. |
| 4 | VCC- | power_in | Negative supply voltage (ground in single-supply use); VCC total supply range is 1.8 to 5.5 V. |
| 5 | IN2+ | input | Non-inverting input of amplifier 2; common-mode range is (VCC-) - 0.1 V to (VCC+) + 0.1 V. |
| 6 | IN2- | input | Inverting input of amplifier 2; input current must be limited to 10 mA by a series resistor. |
| 7 | OUT2 | output | Output of amplifier 2, rail-to-rail, swinging to within 30 mV max of the rails with a 10 kΩ load to VCC/2. |
| 8 | VCC+ | power_in | Positive supply voltage, 1.8 to 5.5 V (6 V absolute maximum); a 0.1 µF decoupling capacitor close to the pin is recommended. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 6 | V | 3 | |||
| Input current | Iin | 10 | mA | Must be limited by series resistor | 3 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Maximum junction temperature | Tj | 150 | °C | 3 | |||
| Thermal resistance junction to ambient | Rthja | 125 | °C/W | SO8, typical value | 3 | ||
| ESD HBM | HBM | 4 | kV | Human body model | 3 | ||
| ESD MM | MM | 300 | V | Machine model | 3 | ||
| ESD CDM | CDM | 1.5 | kV | Charged device model | 3 | ||
| Latch-up immunity | 200 | mA | 3 | ||||
| Supply voltage | VCC | 1.8 | 5.5 | V | 3 | ||
| Operating free air temperature range | Toper | -40 | 125 | °C | 3 | ||
| Input offset voltage (5 V) | Vio | 1 | 5 | µV | VCC = 5 V, T = 25 °C | 6 | |
| Input offset voltage (5 V) | Vio | 8 | µV | VCC = 5 V, -40 °C < T < 125 °C | 6 | ||
| Input offset voltage drift (5 V) | ΔVio/ΔT | 10 | 30 | nV/°C | VCC = 5 V, -40 °C < T < 125 °C | 6 | |
| Input bias current (5 V) | Iib | 70 | 200 | pA | VCC = 5 V, T = 25 °C, Vout = VCC/2 | 6 | |
| Input bias current (5 V) | Iib | 300 | pA | VCC = 5 V, -40 °C < T < 125 °C, Vout = VCC/2 | 6 | ||
| Input offset current (5 V) | Iio | 140 | 400 | pA | VCC = 5 V, T = 25 °C, Vout = VCC/2 | 6 | |
| Input offset current (5 V) | Iio | 600 | pA | VCC = 5 V, -40 °C < T < 125 °C, Vout = VCC/2 | 6 | ||
| Common mode rejection ratio (5 V) | CMR | 115 | 136 | dB | VCC = 5 V, T = 25 °C, Vic = 0 V to VCC, Vout = VCC/2, RL > 1 MΩ | 6 | |
| Common mode rejection ratio (5 V) | CMR | 115 | dB | VCC = 5 V, -40 °C < T < 125 °C, Vic = 0 V to VCC, Vout = VCC/2, RL > 1 MΩ | 6 | ||
| Supply voltage rejection ratio | SVR | 120 | 140 | dB | T = 25 °C, VCC = 1.8 V to 5.5 V, Vout = VCC/2, RL > 1 MΩ | 6 | |
| Supply voltage rejection ratio | SVR | 120 | dB | -40 °C < T < 125 °C, VCC = 1.8 V to 5.5 V, Vout = VCC/2, RL > 1 MΩ | 6 | ||
| Large signal voltage gain (5 V) | Avd | 120 | 135 | dB | VCC = 5 V, T = 25 °C, Vout = 0.5 V to (VCC - 0.5 V) | 6 | |
| Large signal voltage gain (5 V) | Avd | 110 | dB | VCC = 5 V, -40 °C < T < 125 °C, Vout = 0.5 V to (VCC - 0.5 V) | 6 | ||
| High-level output voltage (5 V) | VOH | 30 | mV | VCC = 5 V, T = 25 °C | 6 | ||
| High-level output voltage (5 V) | VOH | 70 | mV | VCC = 5 V, -40 °C < T < 125 °C | 6 | ||
| Low-level output voltage (5 V) | VOL | 30 | mV | VCC = 5 V, T = 25 °C | 6 | ||
| Low-level output voltage (5 V) | VOL | 70 | mV | VCC = 5 V, -40 °C < T < 125 °C | 6 | ||
| Output sink current (5 V) | Iout | 15 | 18 | mA | VCC = 5 V, Isink, Vout = VCC, T = 25 °C | 7 | |
| Output sink current (5 V) | Iout | 14 | mA | VCC = 5 V, Isink, Vout = VCC, -40 °C < T < 125 °C | 7 | ||
| Output source current (5 V) | Iout | 14 | 17 | mA | VCC = 5 V, Isource, Vout = 0 V, T = 25 °C | 7 | |
| Output source current (5 V) | Iout | 12 | mA | VCC = 5 V, Isource, Vout = 0 V, -40 °C < T < 125 °C | 7 | ||
| Supply current per amplifier (5 V) | ICC | 31 | 40 | µA | VCC = 5 V, T = 25 °C, Vout = VCC/2, RL > 1 MΩ | 7 | |
| Supply current per amplifier (5 V) | ICC | 40 | µA | VCC = 5 V, -40 °C < T < 125 °C, Vout = VCC/2, RL > 1 MΩ | 7 | ||
| Input offset voltage (1.8 V) | Vio | 1 | 5 | µV | VCC = 1.8 V, T = 25 °C | 4 | |
| Input offset voltage (1.8 V) | Vio | 8 | µV | VCC = 1.8 V, -40 °C < T < 125 °C | 4 | ||
| Input bias current (1.8 V) | Iib | 50 | 200 | pA | VCC = 1.8 V, T = 25 °C, Vout = VCC/2 | 4 | |
| Common mode rejection ratio (1.8 V) | CMR | 110 | 122 | dB | VCC = 1.8 V, T = 25 °C, Vic = 0 V to VCC, Vout = VCC/2, RL > 1 MΩ | 4 | |
| Large signal voltage gain (1.8 V) | Avd | 118 | 135 | dB | VCC = 1.8 V, T = 25 °C, Vout = 0.5 V to (VCC - 0.5 V) | 4 | |
| High-level output voltage (1.8 V) | VOH | 30 | mV | VCC = 1.8 V, T = 25 °C | 4 | ||
| Low-level output voltage (1.8 V) | VOL | 30 | mV | VCC = 1.8 V, T = 25 °C | 4 | ||
| Output sink current (1.8 V) | Iout | 7 | 8 | mA | VCC = 1.8 V, Isink, Vout = VCC, T = 25 °C | 4 | |
| Output source current (1.8 V) | Iout | 5 | 7 | mA | VCC = 1.8 V, Isource, Vout = 0 V, T = 25 °C | 4 | |
| Supply current per amplifier (1.8 V) | ICC | 28 | 40 | µA | VCC = 1.8 V, T = 25 °C, Vout = VCC/2, RL > 1 MΩ | 4 | |
| Supply current per amplifier (1.8 V) | ICC | 40 | µA | VCC = 1.8 V, -40 °C < T < 125 °C, Vout = VCC/2, RL > 1 MΩ | 4 | ||
| Input offset voltage (3.3 V) | Vio | 1 | 5 | µV | VCC = 3.3 V, T = 25 °C | 5 | |
| Input offset voltage (3.3 V) | Vio | 8 | µV | VCC = 3.3 V, -40 °C < T < 125 °C | 5 | ||
| Input bias current (3.3 V) | Iib | 60 | 200 | pA | VCC = 3.3 V, T = 25 °C, Vout = VCC/2 | 5 | |
| Common mode rejection ratio (3.3 V) | CMR | 115 | 128 | dB | VCC = 3.3 V, T = 25 °C, Vic = 0 V to VCC, Vout = VCC/2, RL > 1 MΩ | 5 | |
| Large signal voltage gain (3.3 V) | Avd | 118 | 135 | dB | VCC = 3.3 V, T = 25 °C, Vout = 0.5 V to (VCC - 0.5 V) | 5 | |
| High-level output voltage (3.3 V) | VOH | 30 | mV | VCC = 3.3 V, T = 25 °C | 5 | ||
| Low-level output voltage (3.3 V) | VOL | 30 | mV | VCC = 3.3 V, T = 25 °C | 5 | ||
| Output sink current (3.3 V) | Iout | 15 | 18 | mA | VCC = 3.3 V, Isink, Vout = VCC, T = 25 °C | 5 | |
| Output source current (3.3 V) | Iout | 14 | 16 | mA | VCC = 3.3 V, Isource, Vout = 0 V, T = 25 °C | 5 | |
| Supply current per amplifier (3.3 V) | ICC | 29 | 40 | µA | VCC = 3.3 V, T = 25 °C, Vout = VCC/2, RL > 1 MΩ | 5 | |
| Supply current per amplifier (3.3 V) | ICC | 40 | µA | VCC = 3.3 V, -40 °C < T < 125 °C, Vout = VCC/2, RL > 1 MΩ | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | The copper traces that connect the output pins to the load and supply pins should be as wide as possible to | 17 |
CAD (KiCad official)
- Symbol:
TSZ122IDT - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tsz122idt-etched.step/tsz122idt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tsz122idt.step/tsz122idt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (38 pp, sha256
2301ec45e2db3f35, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).