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TSX632AIST

Public Made by Adom

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STMicroelectronics Operational Amplifier, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TSX632AIST

STMicroelectronics · Operational Amplifier · MSOP-8

TSX632AIST from STMicroelectronics, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT1 output Output of amplifier 1, rail-to-rail.
2 IN1- input Inverting input of amplifier 1, rail-to-rail with common mode range from VCC- - 0.1 V to VCC+ + 0.1 V.
3 IN1+ input Non-inverting input of amplifier 1, rail-to-rail with common mode range from VCC- - 0.1 V to VCC+ + 0.1 V.
4 VCC- power_in Negative supply voltage, ground in single-supply operation.
5 IN2+ input Non-inverting input of amplifier 2, rail-to-rail with common mode range from VCC- - 0.1 V to VCC+ + 0.1 V.
6 IN2- input Inverting input of amplifier 2, rail-to-rail with common mode range from VCC- - 0.1 V to VCC+ + 0.1 V.
7 OUT2 output Output of amplifier 2, rail-to-rail.
8 VCC+ power_in Positive supply voltage, 3.3 V to 16 V operating range (18 V absolute maximum) with 10 nF decoupling advised close to the pin.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package MSOP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (TSX63xA), T = 25 °C Vio 700 μV VCC+ = +3.3 V; Vicm = VCC/2; RL = 10 kΩ; T = 25 °C 5
Input offset voltage (TSX63xA), -40°C < T < 125 °C Vio 1500 μV VCC+ = +3.3 V; -40°C < T < 125 °C 5
Offset voltage, high common mode, T = 25 °C Vio 4 VCC+ = +3.3 V; Vicm = VCC; RL > 1 MΩ; T = 25 °C 5
Offset voltage, high common mode, -40°C < T < 125 °C Vio 5 VCC+ = +3.3 V; Vicm = VCC; RL > 1 MΩ; -40°C < T < 125 °C 5
Input offset voltage drift ΔVio/ΔT 1 8 μV/°C VCC+ = +3.3 V; -40°C < T < 125 °C 5
Input offset current, T = 25 °C Iio 1 100 pA VCC+ = +3.3 V; Vout = VCC/2; T = 25 °C 5
Input offset current, -40°C < T < 125 °C Iio 200 pA VCC+ = +3.3 V; Vout = VCC/2; -40°C < T < 125 °C 5
Input bias current, T = 25 °C Iib 1 100 pA VCC+ = +3.3 V; Vout = VCC/2; T = 25 °C 5
Input bias current, -40°C < T < 125 °C Iib 200 pA VCC+ = +3.3 V; Vout = VCC/2; -40°C < T < 125 °C 5
Common mode rejection ratio CMR1, T = 25 °C CMR1 65 79 dB VCC+ = +3.3 V; Vicm = -0.1 V to VCC-1.65 V; Vout = VCC/2; RL > 1 MΩ; T = 25 °C 5
Common mode rejection ratio CMR1, -40°C < T < 125 °C CMR1 62 dB VCC+ = +3.3 V; Vicm = -0.1 V to VCC-1.65 V; Vout = VCC/2; RL > 1 MΩ; -40°C < T < 125 °C 5
Common mode rejection ratio CMR2, T = 25 °C CMR2 59 74 dB VCC+ = +3.3 V; Vicm = -0.1 V to VCC+0.1 V; Vout = VCC/2; RL > 1 MΩ; T = 25 °C 5
Common mode rejection ratio CMR2, -40°C < T < 125 °C CMR2 55 dB VCC+ = +3.3 V; Vicm = -0.1 V to VCC+0.1 V; Vout = VCC/2; RL > 1 MΩ; -40°C < T < 125 °C 5
Large signal voltage gain, T = 25 °C Avd 100 110 VCC+ = +3.3 V; Vout = 0.5 V to (VCC - 0.5 V); RL > 1 MΩ; T = 25 °C 5
Large signal voltage gain, -40°C < T < 125 °C Avd 90 VCC+ = +3.3 V; Vout = 0.5 V to (VCC - 0.5 V); RL > 1 MΩ; -40°C < T < 125 °C 5
High level output voltage, T = 25 °C VOH 70 mV VCC+ = +3.3 V; Vid = +1 V; VOH = VCC-Vout; RL = 10 kΩ; T = 25 °C 5
High level output voltage, -40°C < T < 125 °C VOH 100 mV VCC+ = +3.3 V; Vid = +1 V; VOH = VCC-Vout; RL = 10 kΩ; -40°C < T < 125 °C 5
Low level output voltage, T = 25 °C VOL 70 mV VCC+ = +3.3 V; Vid = -1 V; RL = 10 kΩ; T = 25 °C 5
Low level output voltage, -40°C < T < 125 °C VOL 100 mV VCC+ = +3.3 V; Vid = -1 V; RL = 10 kΩ; -40°C < T < 125 °C 5
Output current Isink, T = 25 °C Iout 4.3 5.3 mA VCC+ = +3.3 V; Isink, Vout = VCC; T = 25 °C 5
Output current Isink, -40°C < T < 125 °C Iout 2.5 mA VCC+ = +3.3 V; Isink, Vout = VCC; -40°C < T < 125 °C 5
Output current Isource, T = 25 °C Iout 3.3 4.3 mA VCC+ = +3.3 V; Isource, Vout = 0 V; T = 25 °C 5
Output current Isource, -40°C < T < 125 °C Iout 2.5 mA VCC+ = +3.3 V; Isource, Vout = 0 V; -40°C < T < 125 °C 5
Supply current per operator, T = 25 °C ICC 45 60 µA VCC+ = +3.3 V; Vout = VCC/2; RL > 1 MΩ; T = 25 °C 5
Supply current per operator, -40°C < T < 125 °C ICC 60 µA VCC+ = +3.3 V; Vout = VCC/2; RL > 1 MΩ; -40°C < T < 125 °C 5
Input offset voltage (TSX63xA), T = 25 °C Vio 700 μV VCC+ = +16 V; Vicm = VCC/2; RL = 10 kΩ; T = 25 °C 11
Input offset voltage (TSX63xA), -40°C < T < 125 °C Vio 1500 μV VCC+ = +16 V; -40°C < T < 125 °C 11
Offset voltage, high common mode, T = 25 °C Vio 4 VCC+ = +16 V; Vicm = VCC; RL > 1 MΩ; T = 25 °C 11
Offset voltage, high common mode, -40°C < T < 125 °C Vio 5 VCC+ = +16 V; Vicm = VCC; RL > 1 MΩ; -40°C < T < 125 °C 11
Input offset voltage drift ΔVio/ΔT 1 8 μV/°C VCC+ = +16 V; -40°C < T < 125 °C 11
Input offset current, T = 25 °C Iio 1 100 pA VCC+ = +16 V; Vout = VCC/2; T = 25 °C 11
Input offset current, -40°C < T < 125 °C Iio 200 pA VCC+ = +16 V; Vout = VCC/2; -40°C < T < 125 °C 11
Input bias current, T = 25 °C Iib 1 100 pA VCC+ = +16 V; Vout = VCC/2; T = 25 °C 11
Input bias current, -40°C < T < 125 °C Iib 200 pA VCC+ = +16 V; Vout = VCC/2; -40°C < T < 125 °C 11
Common mode rejection ratio CMR1, T = 25 °C CMR1 71 85 dB VCC+ = +16 V; Vicm = -0.1 V to VCC-1.65 V; Vout = VCC/2; RL > 1 MΩ; T = 25 °C 11
Common mode rejection ratio CMR1, -40°C < T < 125 °C CMR1 68 dB VCC+ = +16 V; Vicm = -0.1 V to VCC-1.65 V; Vout = VCC/2; RL > 1 MΩ; -40°C < T < 125 °C 11
Common mode rejection ratio CMR2, T = 25 °C CMR2 69 83 dB VCC+ = +16 V; Vicm = -0.1 V to VCC+0.1 V; Vout = VCC/2; RL > 1 MΩ; T = 25 °C 11
Common mode rejection ratio CMR2, -40°C < T < 125 °C CMR2 66 dB VCC+ = +16 V; Vicm = -0.1 V to VCC+0.1 V; Vout = VCC/2; RL > 1 MΩ; -40°C < T < 125 °C 11
Supply voltage rejection ratio, T = 25 °C SVR 73 87 dB VCC = 3.3 V to 16 V; Vout = Vicm = VCC/2; T = 25 °C 11
Supply voltage rejection ratio, -40°C < T < 125 °C SVR 70 dB VCC = 3.3 V to 16 V; Vout = Vicm = VCC/2; -40°C < T < 125 °C 11
Large signal voltage gain, T = 25 °C Avd 100 110 VCC+ = +16 V; Vout = 0.5 V to (VCC - 0.5 V); RL > 1 MΩ; T = 25 °C 11
Large signal voltage gain, -40°C < T < 125 °C Avd 90 VCC+ = +16 V; Vout = 0.5 V to (VCC - 0.5 V); RL > 1 MΩ; -40°C < T < 125 °C 11
High level output voltage, T = 25 °C VOH 70 mV VCC+ = +16 V; Vid = +1 V; VOH = VCC-Vout; RL = 10 kΩ; T = 25 °C 11
High level output voltage, -40°C < T < 125 °C VOH 100 mV VCC+ = +16 V; Vid = +1 V; VOH = VCC-Vout; RL = 10 kΩ; -40°C < T < 125 °C 11
Low level output voltage, T = 25 °C VOL 70 mV VCC+ = +16 V; Vid = -1 V; RL = 10 kΩ; T = 25 °C 11
Low level output voltage, -40°C < T < 125 °C VOL 100 mV VCC+ = +16 V; Vid = -1 V; RL = 10 kΩ; -40°C < T < 125 °C 11
Output current Isink, T = 25 °C Iout 40 92 mA VCC+ = +16 V; Isink, Vout = VCC; T = 25 °C 12
Output current Isink, -40°C < T < 125 °C Iout 35 mA VCC+ = +16 V; Isink, Vout = VCC; -40°C < T < 125 °C 12
Output current Isource, T = 25 °C Iout 30 90 mA VCC+ = +16 V; Isource, Vout = 0 V; T = 25 °C 12
Output current Isource, -40°C < T < 125 °C Iout 25 mA VCC+ = +16 V; Isource, Vout = 0 V; -40°C < T < 125 °C 12
Supply current per operator, T = 25 °C ICC 45 60 µA VCC+ = +16 V; Vout = VCC/2; RL > 1 MΩ; T = 25 °C 12
Supply current per operator, -40°C < T < 125 °C ICC 60 µA VCC+ = +16 V; Vout = VCC/2; RL > 1 MΩ; -40°C < T < 125 °C 12
Gain bandwidth product GBP 160 200 kHz RL = 100 kΩ; CL = 100 pF 6
Operating supply voltage VCC 3.3 16 V Operating conditions, Table 3 4
Operating free air temperature range Toper -40 125 °C Operating conditions, Table 3 4
Supply voltage (absolute maximum) VCC 18 V Absolute maximum ratings, Table 2 4
Storage temperature Tstg -65 150 °C Absolute maximum ratings, Table 2 4
Maximum junction temperature Tj 160 °C Absolute maximum ratings, Table 2 4
Thermal resistance junction to ambient (MiniSO-8) Rthja 190 °C/W MiniSO-8; typical value (Table 2 notes 5, 6) 4
ESD human body model (HBM) 4 kV Human body model, 100 pF through 1.5 kΩ (Table 2 note 7) 4

CAD (KiCad official)

  • Symbol: TSX632AIST
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: tsx632aist-etched.step / tsx632aist-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tsx632aist.step / tsx632aist.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (31 pp, sha256 b4c9ac4ba15686b3, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF