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Made with kicad-footprint-generator 10.0 · KiCad file format 20260206
Name Last commit message Last updated
docs tsv912idt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md tsv912idt: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago
tsv912idt-etched.fit.json tsv912idt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tsv912idt-etched.glb tsv912idt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tsv912idt-etched.step tsv912idt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tsv912idt.glb Publish 0.1.0 · Ray 1mo ago
tsv912idt.kicad_mod Publish 0.1.0 · Ray 1mo ago
tsv912idt.kicad_sym Publish 0.1.0 · Ray 1mo ago
tsv912idt.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 8 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
tsv912idt.step Publish 0.1.0 · Ray 1mo ago

TSV912IDT

STMicroelectronics · Operational Amplifier · SO-8

TSV912IDT from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Out1 output Output of op-amp channel 1. Rail-to-rail output stage; can source ~35 mA and sink ~32 mA with V_OL/V_OH within ~15 mV of the rails at 10 kΩ load.
2 In1- input Inverting input of op-amp channel 1. Rail-to-rail input; 1 pA typ input bias current; input voltage range (VCC-)-0.1 V to (VCC+)+0.1 V.
3 In1+ input Non-inverting input of op-amp channel 1. Rail-to-rail input; 1 pA typ input bias current; common-mode range extends 0.1 V beyond each supply rail.
4 VCC- power_in Negative supply rail (or ground in single-supply operation). Total supply (VCC+ minus VCC-) must be 2.5 V to 5.5 V (2.3-5.5 V at 0-125 °C); 6 V absolute maximum.
5 In2+ input Non-inverting input of op-amp channel 2. Rail-to-rail input; 1 pA typ input bias current.
6 In2- input Inverting input of op-amp channel 2. Rail-to-rail input; 1 pA typ input bias current.
7 Out2 output Output of op-amp channel 2. Rail-to-rail output stage; ~35 mA source / ~32 mA sink capability.
8 VCC+ power_in Positive supply rail. 2.5 V to 5.5 V nominal (2.3-5.5 V for 0-125 °C operation); 6 V absolute maximum. Typical supply current 0.78 mA/channel at 5 V, no load.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • TSV912IDT
  • TSV912IDTAIDT
  • TSV912IDTIST
  • TSV912IDTAIST
  • TSV912IDTIQ2T
  • TSV912IDTAIQ2T

CAD (KiCad official)

  • Symbol: TSV912IDT
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: tsv912idt-etched.step / tsv912idt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tsv912idt.step / tsv912idt.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tsv912idt.step 122 KB You want the bare part, or you mark your own boards.
tsv912idt-etched.step 1.7 MB You want the part with TSV912IDT already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 428 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (28 pp, sha256 5c5d25d9eb593dbb, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF