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README

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TSV912AIYST

STMicroelectronics · Operational Amplifier · MSOP-8

TSV912AIYST from STMicroelectronics, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Out1 output Channel 1 rail-to-rail output, typically sinking 32 mA and sourcing 35 mA, and stable with capacitive loads up to 100 pF in a follower.
2 In1- input Channel 1 inverting input, with input voltage limited to (VCC-) - 0.2 V to (VCC+) + 0.2 V and input current limited to 10 mA by a series resistor.
3 In1+ input Channel 1 non-inverting input, with common-mode range of (VCC-) - 0.1 V to (VCC+) + 0.1 V and about 1 pA typical bias current.
4 VCC- power_in Negative supply voltage, or ground in single-supply use, with the total supply range 2.5 V to 5.5 V (absolute maximum 6 V).
5 In2+ input Channel 2 non-inverting input, with common-mode range of (VCC-) - 0.1 V to (VCC+) + 0.1 V and about 1 pA typical bias current.
6 In2- input Channel 2 inverting input, with input voltage limited to (VCC-) - 0.2 V to (VCC+) + 0.2 V and input current limited to 10 mA by a series resistor.
7 Out2 output Channel 2 rail-to-rail output, typically sinking 32 mA and sourcing 35 mA, and stable with capacitive loads up to 100 pF in a follower.
8 VCC+ power_in Positive supply voltage, 2.5 V to 5.5 V over -40 to 125 °C (absolute maximum 6 V), with a 10 nF decoupling capacitor advised close to the pin.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package MSOP-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 6 V 3
Input current Iin 10 mA must be limited by series resistor 3
Storage temperature Tstg -65 150 °C 3
Maximum junction temperature Tj 150 °C 3
ESD HBM HBM 5 kV human body model 3
ESD MM MM 400 V machine model 3
ESD CDM CDM 1500 V MiniSO8 3
Latch-up immunity 200 mA 3
Thermal resistance junction to ambient Rthja 190 °C/W MiniSO8 3
Thermal resistance junction to case Rthjc 39 °C/W MiniSO8 3
Supply voltage VCC 2.5 5.5 V -40 °C < Top < 125 °C 4
Supply voltage VCC 2.3 5.5 V 0 °C < Top < 125 °C 4
Operating free air temperature range Top -40 125 °C 4
Offset voltage, TSV91xA Vio 1.5 mV VCC+ = 5 V, Top = 25 °C 9
Offset voltage, TSV91xA Vio 3 mV VCC+ = 5 V, Tmin < Top < Tmax 9
Input offset voltage drift ∆Vio/∆T 5 μV/°C VCC+ = 5 V 9
Input offset current Iio 1 10 pA VCC+ = 5 V, Top = 25 °C 9
Input offset current Iio 100 pA VCC+ = 5 V, Tmin < Top < Tmax 9
Input bias current Iib 1 10 pA VCC+ = 5 V, Top = 25 °C 9
Input bias current Iib 100 pA VCC+ = 5 V, Tmin < Top < Tmax 9
Common mode rejection ratio CMR 62 82 dB VCC+ = 5 V, 0 V to 5 V, Vout = 2.5 V, Top = 25 °C 9
Common mode rejection ratio CMR 58 dB VCC+ = 5 V, Tmin < Top < Tmax 9
Supply voltage rejection ratio SVR 70 86 dB VCC = 2.5 to 5 V 9
Large signal voltage gain Avd 80 91 dB VCC+ = 5 V, RL = 10 kΩ, Vout = 0.5 V to 4.5 V, Top = 25 °C 9
Large signal voltage gain Avd 75 dB VCC+ = 5 V, Tmin < Top < Tmax 9
High-level output voltage VCC - VOH 15 40 mV VCC+ = 5 V, RL = 10 kΩ 9
High-level output voltage VCC - VOH 40 mV VCC+ = 5 V, RL = 10 kΩ, Tmin < Top < Tmax 9
High-level output voltage VCC - VOH 45 150 mV VCC+ = 5 V, RL = 600 Ω 9
High-level output voltage VCC - VOH 150 mV VCC+ = 5 V, RL = 600 Ω, Tmin < Top < Tmax 9
Low-level output voltage VOL 15 40 mV VCC+ = 5 V, RL = 10 kΩ 9
Low-level output voltage VOL 40 mV VCC+ = 5 V, RL = 10 kΩ, Tmin < Top < Tmax 9
Low-level output voltage VOL 45 150 mV VCC+ = 5 V, RL = 600 Ω 9
Low-level output voltage VOL 150 mV VCC+ = 5 V, RL = 600 Ω, Tmin < Top < Tmax 9
Output sink current Isink 18 32 mA VCC+ = 5 V, Vo = 5 V, Top = 25 °C 9
Output sink current Isink 16 mA VCC+ = 5 V, Tmin < Top < Tmax 9
Output source current Isource 18 35 mA VCC+ = 5 V, Vo = 0 V, Top = 25 °C 9
Output source current Isource 16 mA VCC+ = 5 V, Tmin < Top < Tmax 9
Supply current (per channel) ICC 0.78 1.1 mA VCC+ = 5 V, No load, Vout = 2.5 V 9
Supply current (per channel) ICC 1.1 mA VCC+ = 5 V, Tmin < Top < Tmax 9
Gain bandwidth product GBP 8 MHz VCC+ = 5 V, RL = 2 kΩ, CL = 100 pF, f = 100 kHz, Top = 25 °C 9
Unity gain frequency Fu 7.5 MHz VCC+ = 5 V, RL = 2 kΩ, CL = 100 pF, Top = 25 °C 9
Phase margin ϕm 45 Degrees VCC+ = 5 V, RL = 2 kΩ, CL = 100 pF, Top = 25 °C 9
Gain margin Gm 8 dB VCC+ = 5 V, RL = 2 kΩ, CL = 100 pF, Top = 25 °C 9
Slew rate SR 4.5 V/μs VCC+ = 5 V, RL = 2 kΩ, CL = 100 pF, Av = 1, Top = 25 °C 10
Equivalent input noise voltage en 27 nV/√Hz VCC+ = 5 V, f = 1 kHz, Top = 25 °C 10
Equivalent input noise voltage en 21 nV/√Hz VCC+ = 5 V, f = 10 kHz, Top = 25 °C 10
Total harmonic distortion THD+en 0.0004 % VCC+ = 5 V, G = 1, f = 1 kHz, RL = 2 kΩ, BW = 22 kHz, Top = 25 °C, Vicm = (VCC + 1)/2, Vout = 3.6 Vpp 10
Supply current (per channel) ICC 0.78 1.1 mA VCC+ = 2.5 V, No load, Vout = VCC/2 5
Supply current (per channel) ICC 0.8 1.1 mA VCC+ = 3.3 V, No load, Vout = VCC/2 7
Common mode rejection ratio CMR 58 75 dB VCC+ = 2.5 V, 0 V to 2.5 V, Vout = 1.25 V, Top = 25 °C 5
Common mode rejection ratio CMR 60 78 dB VCC+ = 3.3 V, 0 V to 3.3 V, Vout = 1.65 V, Top = 25 °C 7
Large signal voltage gain Avd 80 89 dB VCC+ = 2.5 V, RL = 10 kΩ, Vout = 0.5 V to 2 V, Top = 25 °C 5
Large signal voltage gain Avd 80 89 dB VCC+ = 3.3 V, RL = 10 kΩ, Vout = 0.5 V to 2.8 V, Top = 25 °C 7

CAD (KiCad official)

  • Symbol: TSV912AIYST
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: tsv912aiyst-etched.step / tsv912aiyst-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tsv912aiyst.step / tsv912aiyst.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (28 pp, sha256 5c5d25d9eb593dbb, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF