tsv911aiydt: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body…
tsv911aiydt: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
tsv911aiydt: laser-etched CAD + chip hero (factory 2.0.0 backfill)
tsv911aiydt: backfill missing artifacts (etch, variants)
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
tsv911aiydt: factory component page (tier=lcsc)
Initial commit: component/tsv911aiydt