component
TSV611AICT
Public Made by Adomby adom
STMicroelectronics Operational Amplifier, SC-70-5. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTSV611AICT
STMicroelectronics · Operational Amplifier · SC-70-5
TSV611AICT from STMicroelectronics, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC- | power_in | Negative power supply terminal; typically grounded or connected to negative supply rail with operating voltage from 0 V or negative supply to maintain 1.5 to 5.5 V across supply rails. |
| 2 | In+ | input | Non-inverting input terminal with common mode voltage range (VCC-) - 0.1 to (VCC+) + 0.1 V; maximum input voltage (VCC-) - 0.2 to (VCC+) + 0.2 V. |
| 3 | In- | input | Inverting input terminal with common mode voltage range (VCC-) - 0.1 to (VCC+) + 0.1 V; maximum input voltage (VCC-) - 0.2 to (VCC+) + 0.2 V. |
| 4 | Out | output | Rail-to-rail output terminal; output voltage swing within 35 mV of supply rails when driving 10 kΩ load at 1.8 to 5 V supply voltage. |
| 5 | VCC+ | power_in | Positive power supply terminal with operating voltage range 1.5 to 5.5 V; maximum supply voltage 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SC-70-5 |
| Category | Amplifiers/Comparators |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VCC | 6 | V | 3 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Maximum junction temperature | Tj | 150 | °C | 3 | |||
| ESD HBM (human body model) | ESD | 4 | kV | 100 pF discharged through 1.5 kΩ | 3 | ||
| ESD MM (machine model) | ESD | 200 | V | 200 pF, no series resistor | 3 | ||
| ESD CDM (charged device model) | ESD | 1.5 | kV | 3 | |||
| Supply voltage (operating) | VCC | 1.5 | 5.5 | V | 3 | ||
| Operating free-air temperature range | Toper | -40 | 85 | °C | 3 | ||
| Thermal resistance junction to ambient, SC70-5 | Rthja | 205 | °C/W | Rth typical values | 3 | ||
| Offset voltage, TSV61xA (VCC+ = 1.8 V) | Vio | 0.8 | mV | 4 | |||
| Offset voltage, TSV61xA over temperature (VCC+ = 1.8 V) | Vio | 2 | mV | Tmin. < Top < Tmax. | 4 | ||
| Common mode rejection ratio (VCC+ = 1.8 V) | CMR | 55 | 71 | dB | 0 V to 1.8 V, Vout = 0.9 V | 4 | |
| Common mode rejection ratio over temperature (VCC+ = 1.8 V) | CMR | 53 | dB | Tmin. < Top < Tmax. | 4 | ||
| Large signal voltage gain (VCC+ = 1.8 V) | Avd | 78 | 83 | RL = 10 kΩ, Vout = 0.5 V to 1.3 V | 4 | ||
| Large signal voltage gain over temperature (VCC+ = 1.8 V) | Avd | 74 | Tmin. < Top < Tmax. | 4 | |||
| High level output voltage (VCC+ = 1.8 V) | VOH | 4 | 35 | mV | RL = 10 kΩ | 4 | |
| High level output voltage over temperature (VCC+ = 1.8 V) | VOH | 50 | mV | Tmin. < Top < Tmax. | 4 | ||
| Low level output voltage (VCC+ = 1.8 V) | VOL | 7 | 35 | mV | RL = 10 kΩ | 4 | |
| Low level output voltage over temperature (VCC+ = 1.8 V) | VOL | 50 | mV | Tmin. < Top < Tmax. | 4 | ||
| Output sink current (VCC+ = 1.8 V) | Isink | 9 | 13 | mA | Vo = 1.8 V | 4 | |
| Output sink current over temperature (VCC+ = 1.8 V) | Isink | 9 | mA | Tmin. < Top < Tmax. | 4 | ||
| Output source current (VCC+ = 1.8 V) | Isource | 8 | 10 | mA | Vo = 0 V | 4 | |
| Output source current over temperature (VCC+ = 1.8 V) | Isource | 8 | mA | Tmin. < Top < Tmax. | 4 | ||
| Supply current per operator (VCC+ = 1.8 V) | ICC | 6.5 | 9 | 12 | µA | No load, Vout = Vcc/2 | 4 |
| Supply current per operator over temperature (VCC+ = 1.8 V) | ICC | 6 | 12.5 | µA | Tmin. < Top < Tmax. | 4 | |
| Offset voltage, TSV61xA (VCC+ = 3.3 V) | Vio | 0.8 | mV | 6 | |||
| Offset voltage, TSV61xA over temperature (VCC+ = 3.3 V) | Vio | 2 | mV | Tmin<Top<Tmax | 6 | ||
| Common mode rejection ratio (VCC+ = 3.3 V) | CMR | 61 | 76 | dB | 0 V to 3.3 V, Vout = 1.75 V | 6 | |
| Common mode rejection ratio over temperature (VCC+ = 3.3 V) | CMR | 58 | dB | Tmin. < Top < Tmax. | 6 | ||
| Large signal voltage gain (VCC+ = 3.3 V) | Avd | 85 | 92 | RL = 10 kΩ, Vout = 0.5 V to 2.8 V | 6 | ||
| Large signal voltage gain over temperature (VCC+ = 3.3 V) | Avd | 83 | Tmin. < Top < Tmax. | 6 | |||
| High level output voltage (VCC+ = 3.3 V) | VOH | 5 | 35 | mV | RL = 10 kΩ | 6 | |
| High level output voltage over temperature (VCC+ = 3.3 V) | VOH | 50 | mV | Tmin. < Top < Tmax. | 6 | ||
| Low level output voltage (VCC+ = 3.3 V) | VOL | 10 | 35 | mV | RL = 10 kΩ | 6 | |
| Low level output voltage over temperature (VCC+ = 3.3 V) | VOL | 50 | mV | Tmin. < Top < Tmax. | 6 | ||
| Output sink current (VCC+ = 3.3 V) | Isink | 37 | 44 | mA | Vo = VCC | 6 | |
| Output sink current over temperature (VCC+ = 3.3 V) | Isink | 35 | mA | Tmin. < Top < Tmax. | 6 | ||
| Output source current (VCC+ = 3.3 V) | Isource | 32 | 38 | mA | Vo = 0 V | 6 | |
| Output source current over temperature (VCC+ = 3.3 V) | Isource | 30 | mA | Tmin. < Top < Tmax. | 6 | ||
| Supply current per operator (VCC+ = 3.3 V) | ICC | 6.5 | 9.5 | 12.5 | µA | No load, Vout = VCC/2 | 6 |
| Supply current per operator over temperature (VCC+ = 3.3 V) | ICC | 6 | 13 | µA | Tmin. < Top < Tmax. | 6 | |
| Offset voltage, TSV61xA (VCC+ = 5 V) | Vio | 0.8 | mV | 7 | |||
| Offset voltage, TSV61xA over temperature (VCC+ = 5 V) | Vio | 2 | mV | Tmin<Top<Tmax | 7 | ||
| Common mode rejection ratio (VCC+ = 5 V) | CMR | 64 | 80 | dB | 0 V to 5 V, Vout = 2.5 V | 7 | |
| Common mode rejection ratio over temperature (VCC+ = 5 V) | CMR | 63 | dB | Tmin. < Top < Tmax. | 7 | ||
| Supply voltage rejection ratio (VCC+ = 5 V) | SVR | 76 | 93 | Vcc = 1.8 to 5 V | 7 | ||
| Supply voltage rejection ratio over temperature (VCC+ = 5 V) | SVR | 74 | Tmin. < Top < Tmax. | 7 | |||
| Large signal voltage gain (VCC+ = 5 V) | Avd | 88 | 93 | RL = 10 kΩ, Vout = 0.5 V to 4.5 V | 7 | ||
| Large signal voltage gain over temperature (VCC+ = 5 V) | Avd | 85 | Tmin<Top<Tmax | 7 | |||
| High level output voltage (VCC+ = 5 V) | VOH | 7 | 35 | mV | RL = 10 kΩ | 7 | |
| High level output voltage over temperature (VCC+ = 5 V) | VOH | 50 | mV | Tmin. < Top < Tmax. | 7 | ||
| Low level output voltage (VCC+ = 5 V) | VOL | 16 | 35 | mV | RL = 10 kΩ | 7 | |
| Low level output voltage over temperature (VCC+ = 5 V) | VOL | 50 | mV | Tmin. < Top < Tmax. | 7 | ||
| Output sink current (VCC+ = 5 V) | Isink | 52 | 57 | mA | Vo = VCC | 7 | |
| Output sink current over temperature (VCC+ = 5 V) | Isink | 42 | mA | Tmin. < Top < Tmax. | 7 | ||
| Output source current (VCC+ = 5 V) | Isource | 58 | 63 | mA | Vo = 0 V | 7 | |
| Output source current over temperature (VCC+ = 5 V) | Isource | 49 | mA | Tmin. < Top < Tmax. | 7 | ||
| Supply current per operator (VCC+ = 5 V) | ICC | 7.5 | 10.5 | 14 | µA | No load, Vout = VCC/2 | 7 |
| Supply current per operator over temperature (VCC+ = 5 V) | ICC | 7 | 15 | µA | Tmin. < Top < Tmax. | 7 |
CAD (KiCad official)
- Symbol:
TSV611AICT - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files:
tsv611aict-etched.step/tsv611aict-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tsv611aict.step/tsv611aict.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (21 pp, sha256
cba404efd89d0113, retrieved 2026-10-21, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).