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TSV524IQ4T

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STMicroelectronics Operational Amplifier, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TSV524IQ4T

STMicroelectronics · Operational Amplifier · QFN-16-EP(3x3)

TSV524IQ4T from STMicroelectronics, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1+ input Non-inverting input of amplifier 1; the rail-to-rail input common-mode range extends from VCC- - 0.1 V to VCC+ + 0.1 V, and the input current must not exceed 10 mA, so a series resistor is used to limit it.
2 VCC+ power_in Positive supply pin; the supply voltage is specified from 2.7 V to 5.5 V.
3 NC unconnected Not connected (marked NC in the pin connection figure).
4 IN2+ input Non-inverting input of amplifier 2; the rail-to-rail input common-mode range extends from VCC- - 0.1 V to VCC+ + 0.1 V, and the input current must not exceed 10 mA.
5 IN2- input Inverting input of amplifier 2; the input current must not exceed 10 mA, so a series resistor is used to limit it.
6 OUT2 output Output of amplifier 2; it swings to within 35 mV of each rail when loaded with 10 kΩ to VCC/2.
7 OUT3 output Output of amplifier 3; it swings to within 35 mV of each rail when loaded with 10 kΩ to VCC/2.
8 IN3- input Inverting input of amplifier 3; the input current must not exceed 10 mA, so a series resistor is used to limit it.
9 IN3+ input Non-inverting input of amplifier 3; the rail-to-rail input common-mode range extends from VCC- - 0.1 V to VCC+ + 0.1 V, and the input current must not exceed 10 mA.
10 VCC- power_in Negative supply pin (0 V reference in the electrical characterization); the exposed pad may be connected to this pin or left floating.
11 NC unconnected Not connected (marked NC in the pin connection figure).
12 IN4+ input Non-inverting input of amplifier 4; the rail-to-rail input common-mode range extends from VCC- - 0.1 V to VCC+ + 0.1 V, and the input current must not exceed 10 mA.
13 IN4- input Inverting input of amplifier 4; the input current must not exceed 10 mA, so a series resistor is used to limit it.
14 OUT4 output Output of amplifier 4; it swings to within 35 mV of each rail when loaded with 10 kΩ to VCC/2.
15 OUT1 output Output of amplifier 1; it swings to within 35 mV of each rail when loaded with 10 kΩ to VCC/2.
16 IN1- input Inverting input of amplifier 1; the input current must not exceed 10 mA, so a series resistor is used to limit it.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package QFN-16-EP(3x3)
Category Amplifiers/Comparators
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 6 V 4
Input current Iin 10 mA 4
Storage temperature Tstg -65 150 °C 4
Maximum junction temperature Tj 150 °C 4
Operating free air temperature range Toper -40 125 °C 4
Supply voltage VCC 2.7 5.5 V 4
Offset voltage (TSV52x) Vio 1.5 mV VCC+ = +2.7 V, VCC- = 0 V; T = 25 °C 5
Offset voltage (TSV52x) Vio 3.3 mV VCC+ = +2.7 V, VCC- = 0 V; -40 °C < T < 125 °C 5
Input offset voltage drift ΔVio/ΔT 3 18 µV/°C VCC+ = +2.7 V; -40 °C < T < 125 °C 5
Input offset current Iio 1 10 pA VCC+ = +2.7 V; Vout = VCC/2; T = 25 °C 5
Input offset current Iio 1 100 pA VCC+ = +2.7 V; Vout = VCC/2; -40 °C < T < 125 °C 5
Input bias current Iib 1 10 pA VCC+ = +2.7 V; Vout = VCC/2; T = 25 °C 5
Input bias current Iib 1 100 pA VCC+ = +2.7 V; Vout = VCC/2; -40 °C < T < 125 °C 5
Common-mode rejection ratio CMR 50 72 dB VCC+ = +2.7 V; Vic = -0.1 V to VCC+0.1V, Vout = VCC/2, RL = 1 MΩ; T = 25 °C 5
Common-mode rejection ratio CMR 46 dB VCC+ = +2.7 V; Vic = -0.1 V to VCC+0.1V, Vout = VCC/2, RL = 1 MΩ; -40 °C < T < 125 °C 5
Large signal voltage gain Avd 90 105 dB VCC+ = +2.7 V; Vout = 0.5 V to (VCC - 0.5V), RL = 1 MΩ; T = 25 °C 5
Large signal voltage gain Avd 60 dB VCC+ = +2.7 V; Vout = 0.5 V to (VCC - 0.5V), RL = 1 MΩ; -40 °C < T < 125 °C 5
High level output voltage VOH 3 35 mV VCC+ = +2.7 V; RL = 10 kΩ to VCC/2; T = 25 °C 5
High level output voltage VOH 50 mV VCC+ = +2.7 V; RL = 10 kΩ to VCC/2; -40 °C < T < 125 °C 5
Low level output voltage VOL 6 35 mV VCC+ = +2.7 V; RL = 10 kΩ to VCC/2; T = 25 °C 5
Low level output voltage VOL 50 mV VCC+ = +2.7 V; RL = 10 kΩ to VCC/2; -40 °C < T < 125 °C 5
Output sink current Isink 12 22 mA VCC+ = +2.7 V; Vout = VCC; T = 25 °C 5
Output sink current Isink 8 mA VCC+ = +2.7 V; Vout = VCC; -40 °C < T < 125 °C 5
Output source current Isource 12 18 mA VCC+ = +2.7 V; Vout = 0 V; T = 25 °C 5
Output source current Isource 8 mA VCC+ = +2.7 V; Vout = 0 V; -40 °C < T < 125 °C 5
Supply current (per channel) ICC 30 51 µA VCC+ = +2.7 V; Vout = VCC/2, RL > 1 MΩ; T = 25 °C 5
Gain bandwidth product GBP 0.62 1 MHz VCC+ = +2.7 V; RL = 10 kΩ, CL = 100 pF 5
Offset voltage (TSV52x) Vio 1 mV VCC+ = +5 V, VCC- = 0 V; T = 25 °C 7
Offset voltage (TSV52x) Vio 2.8 mV VCC+ = +5 V, VCC- = 0 V; -40 °C < T < 125 °C 7
Input offset voltage drift ΔVio/ΔT 3 18 µV/°C VCC+ = +5 V; -40 °C < T < 125 °C 7
Input offset current Iio 1 10 pA VCC+ = +5 V; Vout = VCC/2; T = 25 °C 7
Input offset current Iio 1 100 pA VCC+ = +5 V; Vout = VCC/2; -40 °C < T < 125 °C 7
Input bias current Iib 1 10 pA VCC+ = +5 V; Vout = VCC/2; T = 25 °C 7
Input bias current Iib 1 100 pA VCC+ = +5 V; Vout = VCC/2; -40 °C < T < 125 °C 7
Common-mode rejection ratio 1 CMR1 54 76 dB VCC+ = +5 V; Vic = -0.1 V to VCC +0.1 V, Vout = VCC/2, RL = 1 MΩ; T = 25 °C 7
Common-mode rejection ratio 1 CMR1 50 dB VCC+ = +5 V; Vic = -0.1 V to VCC +0.1 V, Vout = VCC/2, RL = 1 MΩ; -40 °C < T < 125 °C 7
Common-mode rejection ratio 2 CMR2 63 84 dB VCC+ = +5 V; Vic = 1 V to VCC -1 V, Vout = VCC/2, RL = 1 MΩ; T = 25 °C 7
Common-mode rejection ratio 2 CMR2 58 dB VCC+ = +5 V; Vic = 1 V to VCC -1 V, Vout = VCC/2, RL = 1 MΩ; -40 °C < T < 125 °C 7
Supply voltage rejection ratio SVR 65 87 dB VCC = 2.7 V to 5.5 V, Vout = VCC/2; T = 25 °C 8
Supply voltage rejection ratio SVR 60 dB VCC = 2.7 V to 5.5 V, Vout = VCC/2; -40 °C < T < 125 °C 8
Large signal voltage gain Avd 94 109 dB VCC+ = +5 V; Vout = 0.5 V to (VCC - 0.5 V), RL = 1 MΩ; T = 25 °C 8
Large signal voltage gain Avd 68 dB VCC+ = +5 V; Vout = 0.5 V to (VCC - 0.5 V), RL = 1 MΩ; -40 °C < T < 125 °C 8
High level output voltage VOH 5 35 mV VCC+ = +5 V; RL = 10 kΩ to VCC/2; T = 25 °C 8
High level output voltage VOH 50 mV VCC+ = +5 V; RL = 10 kΩ to VCC/2; -40 °C < T < 125 °C 8
Low level output voltage VOL 9 35 mV VCC+ = +5 V; RL = 10 kΩ to VCC/2; T = 25 °C 8
Low level output voltage VOL 50 mV VCC+ = +5 V; RL = 10 kΩ to VCC/2; -40 °C < T < 125 °C 8
Output sink current Isink 36 55 mA VCC+ = +5 V; Vout = VCC; T = 25 °C 8
Output sink current Isink 27 mA VCC+ = +5 V; Vout = VCC; -40 °C < T < 125 °C 8
Output source current Isource 36 55 mA VCC+ = +5 V; Vout = 0 V; T = 25 °C 8
Output source current Isource 27 mA VCC+ = +5 V; Vout = 0 V; -40 °C < T < 125 °C 8
Supply current (per channel) ICC 45 60 µA VCC+ = +5 V; Vout = VCC/2, RL > 1 MΩ; T = 25 °C 8
Gain bandwidth product GBP 0.73 1.15 MHz VCC+ = +5 V; RL = 10 kΩ, CL = 100 pF 8
Thermal resistance junction-to-ambient, QFN16 3x3 Rthja 45 °C/W Rth are typical values 4

CAD (KiCad official)

  • Symbol: TSV524IQ4T
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tsv524iq4t-etched.step / tsv524iq4t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tsv524iq4t.step / tsv524iq4t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (27 pp, sha256 f943e62c5e69a0ca, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF