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TSV358IYDT

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STMicroelectronics Operational Amplifier, SO-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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TSV358IYDT

STMicroelectronics · Operational Amplifier · SO-8

TSV358IYDT from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Output 1 output Amplifier 1 rail-to-rail output, able to drive a 32 Ω load with typical 80 mA output current and stable up to 500 pF.
2 Inverting input 1 input Amplifier 1 inverting input; common mode range VDD - 0.2 V to VCC + 0.2 V at 25 °C, and differential input voltage limited to ±1 V.
3 Non-inverting input 1 input Amplifier 1 non-inverting input; common mode range VDD - 0.2 V to VCC + 0.2 V at 25 °C, and differential input voltage limited to ±1 V.
4 VDD power_in Negative supply rail, tied to ground (0 V) in single-supply operation.
5 Non-inverting input 2 input Amplifier 2 non-inverting input; common mode range VDD - 0.2 V to VCC + 0.2 V at 25 °C, and differential input voltage limited to ±1 V.
6 Inverting input 2 input Amplifier 2 inverting input; common mode range VDD - 0.2 V to VCC + 0.2 V at 25 °C, and differential input voltage limited to ±1 V.
7 Output 2 output Amplifier 2 rail-to-rail output, able to drive a 32 Ω load with typical 80 mA output current and stable up to 500 pF.
8 VCC power_in Positive supply voltage, operating range 2.5 V to 6 V with an absolute maximum of 7 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 7 V Voltages with respect to network terminal (note 1) 3
Differential input voltage Vid -1 1 V Non-inverting input with respect to inverting input (note 2) 3
Storage temperature Tstg -65 150 °C 3
Maximum junction temperature Tj 150 °C 3
ESD HBM (human body model) 2 kV 100 pF discharged through 1.5 kΩ (note 4) 3
ESD MM (machine model) 200 V 200 pF capacitor (note 5) 3
ESD CDM (charged device model) 1.5 kV Note 6 3
Latch-up immunity 200 mA 3
Lead temperature (soldering, 10 s) 250 °C Soldering, 10 s 3
Supply voltage VCC 2.5 6 V 4
Operating free air temperature range Toper -40 125 °C 4
Input offset voltage Vio 0.2 3 mV Vicm = Vout = VCC/2; table VCC=+3 V, Tamb=25 °C; TSV321/358/324 5
Input offset voltage Vio 6 mV Tmin ≤ Tamb ≤ Tmax; table VCC=+3 V 5
Input offset current Iio 3 30 nA Vicm = Vout = VCC/2 (note 1); table VCC=+3 V 5
Input offset current Iio 60 nA Tmin ≤ Tamb ≤ Tmax 5
Input bias current Iib 40 125 nA Vicm = Vout = VCC/2 (note 1); table VCC=+3 V 5
Input bias current Iib 150 nA Tmin ≤ Tamb ≤ Tmax 5
Common mode rejection ratio CMR 60 80 dB 20 log (ΔVic/ΔVio); 0 ≤ Vicm ≤ VCC, Vout = VCC/2; table VCC=+3 V 5
Large signal voltage gain Avd 80 92 Vout = 0.5 V to 2.5 V, RL = 2 kΩ; table VCC=+3 V 5
Large signal voltage gain Avd 74 95 Vout = 0.5 V to 2.5 V, RL = 600 Ω; table VCC=+3 V 5
High level output voltage VOH 2.82 2.95 V VOH = Vout; Vid = 100 mV, RL = 2 kΩ; table VCC=+3 V 5
High level output voltage VOH 2.8 2.95 V VOH = Vout; Vid = 100 mV, RL = 600 Ω; table VCC=+3 V 5
High level output voltage VOH 2.82 V VOH = Vout; Vid = 100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 2 kΩ; table VCC=+3 V 5
High level output voltage VOH 2.8 V VOH = Vout; Vid = 100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 600 Ω; table VCC=+3 V 5
Low level output voltage VOL 88 120 mV Vid = -100 mV, RL = 2 kΩ; table VCC=+3 V 5
Low level output voltage VOL 115 160 mV Vid = -100 mV, RL = 600 Ω; table VCC=+3 V 5
Low level output voltage VOL 120 mV Vid = -100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 2 kΩ; table VCC=+3 V 5
Low level output voltage VOL 160 mV Vid = -100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 600 Ω; table VCC=+3 V 5
Output source current Io 20 80 mA Vid = 100 mV, VO = VDD; table VCC=+3 V 5
Output sink current Io 20 80 mA Vid = -100 mV, VO = VCC; table VCC=+3 V 5
Supply current (per amplifier) ICC 420 650 µA AVCL = 1, no load; table VCC=+3 V 5
Supply current (per amplifier) ICC 690 µA Tmin ≤ Tamb ≤ Tmax; table VCC=+3 V 5
Gain bandwidth product GBP 1 1.3 MHz RL = 10 kΩ, CL = 100 pF, f = 100 kHz; table VCC=+3 V 5
Slew rate SR 0.42 0.6 V/µs RL = 10 kΩ, CL = 100 pF; table VCC=+3 V 5
Input offset voltage Vio 0.2 3 mV Vicm = Vout = VCC/2; table VCC=+5 V, Tamb=25 °C; TSV321/358/324 6
Input offset voltage Vio 6 mV Tmin ≤ Tamb ≤ Tmax; table VCC=+5 V 6
Input offset current Iio 3 30 nA Vicm = Vout = VCC/2 (note 1); table VCC=+5 V 6
Input offset current Iio 60 nA Tmin ≤ Tamb ≤ Tmax 6
Input bias current Iib 70 130 nA Vicm = Vout = VCC/2 (note 1); table VCC=+5 V 6
Input bias current Iib 150 nA Tmin ≤ Tamb ≤ Tmax 6
Common mode rejection ratio CMR 65 85 dB 20 log (ΔVic/ΔVio); 0 ≤ Vicm ≤ VCC, Vout = VCC/2; table VCC=+5 V 6
Supply voltage rejection ratio SVR 70 90 20 log (ΔVCC/ΔVio); VCC = 2.5 V to 5 V 6
Large signal voltage gain Avd 83 92 Vout = 0.5 V to 4.5 V, RL = 2 kΩ; table VCC=+5 V 6
Large signal voltage gain Avd 77 85 Vout = 0.5 V to 4.5 V, RL = 600 Ω; table VCC=+5 V 6
High level output voltage VOH 4.8 4.95 V VOH = Vout; Vid = 100 mV, RL = 2 kΩ; table VCC=+5 V 6
High level output voltage VOH 4.75 4.9 V VOH = Vout; Vid = 100 mV, RL = 600 Ω; table VCC=+5 V 6
High level output voltage VOH 4.8 V VOH = Vout; Vid = 100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 2 kΩ; table VCC=+5 V 6
High level output voltage VOH 4.75 V VOH = Vout; Vid = 100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 600 Ω; table VCC=+5 V 6
Low level output voltage VOL 88 130 mV Vid = -100 mV, RL = 2 kΩ; table VCC=+5 V 6
Low level output voltage VOL 115 188 mV Vid = -100 mV, RL = 600 Ω; table VCC=+5 V 6
Low level output voltage VOL 130 mV Vid = -100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 2 kΩ; table VCC=+5 V 6
Low level output voltage VOL 188 mV Vid = -100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 600 Ω; table VCC=+5 V 6
Output source current Io 20 80 mA Vid = 100 mV, VO = VDD; table VCC=+5 V 6
Output sink current Io 20 80 mA Vid = -100 mV, VO = VCC; table VCC=+5 V 6
Supply current (per amplifier) ICC 500 835 µA AVCL = 1, no load; table VCC=+5 V 6
Supply current (per amplifier) ICC 875 µA Tmin ≤ Tamb ≤ Tmax; table VCC=+5 V 6
Gain bandwidth product GBP 1 1.4 MHz RL = 10 kΩ, CL = 100 pF, f = 100 kHz; table VCC=+5 V 6
Slew rate SR 0.42 0.6 V/µs RL = 10 kΩ, CL = 100 pF; table VCC=+5 V 6
Thermal resistance junction-to-ambient (SO8) Rthja 125 °C/W SO8 package; typical value (note 3) 3
Thermal resistance junction-to-case (SO8) Rthjc 40 °C/W SO8 package; typical value (note 3) 3

CAD (KiCad official)

  • Symbol: TSV358IYDT
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: tsv358iydt-etched.step / tsv358iydt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tsv358iydt.step / tsv358iydt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (21 pp, sha256 21a84d3a9300848f, retrieved 2026-10-21, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF