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TSV358IPT

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STMicroelectronics Operational Amplifier, TSSOP-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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Contents

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TSV358IPT

STMicroelectronics · Operational Amplifier · TSSOP-8

TSV358IPT from STMicroelectronics, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Output 1 output Output of amplifier 1, rail-to-rail, able to drive a 32 Ω load with about 80 mA typical output current.
2 Inverting input 1 input Inverting input of amplifier 1; differential input voltage limited to ±1 V and input voltage VDD -0.3 V to VCC +0.3 V.
3 Non-inverting input 1 input Non-inverting input of amplifier 1; common mode range VDD -0.2 V to VCC +0.2 V at 25 °C.
4 VDD power_in Negative supply (ground reference, VDD = 0 V in the electrical characteristics).
5 Non-inverting input 2 input Non-inverting input of amplifier 2; common mode range VDD -0.2 V to VCC +0.2 V at 25 °C.
6 Inverting input 2 input Inverting input of amplifier 2; differential input voltage limited to ±1 V and input voltage VDD -0.3 V to VCC +0.3 V.
7 Output 2 output Output of amplifier 2, rail-to-rail, able to drive a 32 Ω load with about 80 mA typical output current.
8 VCC power_in Positive supply, operating range 2.5 V to 6 V, absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TSSOP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2.5 6 V 4
Operating free air temperature range Toper -40 125 °C 4
Supply voltage VCC 7 V 3
Differential input voltage Vid -1 1 V If Vid > ±1 V, maximum input current must not exceed ±1 mA 3
Storage temperature Tstg -65 150 °C 3
Maximum junction temperature Tj 150 °C 3
Thermal resistance junction-to-ambient, TSSOP8 Rthja 120 °C/W TSSOP8 package; typical value 3
Thermal resistance junction-to-case, TSSOP8 Rthjc 37 °C/W TSSOP8 package; typical value 3
ESD human body model HBM 2 kV 100 pF discharged through 1.5 kΩ 3
ESD machine model MM 200 V 200 pF capacitor 3
ESD charged device model CDM 1.5 kV 3
Latch-up immunity 200 mA 3
Lead temperature (soldering) 250 °C soldering, 10 s 3
Input offset voltage Vio 0.2 3 mV VCC = +3 V, Vicm = Vout = VCC /2 5
Input offset voltage Vio 6 mV VCC = +3 V, Tmin ≤ Tamb ≤ Tmax 5
Input offset current Iio 3 30 nA VCC = +3 V, Vicm = Vout = VCC /2 5
Input offset current Iio 60 nA VCC = +3 V, Tmin ≤ Tamb ≤ Tmax 5
Input bias current Iib 40 125 VCC = +3 V, Vicm = Vout = VCC /2 5
Input bias current Iib 150 VCC = +3 V, Tmin ≤ Tamb ≤ Tmax 5
Common mode rejection ratio CMR 60 80 dB VCC = +3 V, 0 ≤ Vicm ≤ VCC, Vout = VCC /2 5
Large signal voltage gain Avd 80 92 VCC = +3 V, Vout = 0.5 V to 2.5 V, RL = 2 kΩ 5
Large signal voltage gain Avd 74 95 VCC = +3 V, Vout = 0.5 V to 2.5 V, RL = 600 Ω 5
High level output voltage VOH 2.82 2.95 V VCC = +3 V, Vid = 100 mV, RL = 2 kΩ 5
High level output voltage VOH 2.8 2.95 V VCC = +3 V, Vid = 100 mV, RL = 600 Ω 5
High level output voltage VOH 2.82 V VCC = +3 V, Vid = 100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 2 kΩ 5
High level output voltage VOH 2.8 V VCC = +3 V, Vid = 100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 600 Ω 5
Low level output voltage VOL 88 120 mV VCC = +3 V, Vid = -100 mV, RL = 2 kΩ 5
Low level output voltage VOL 115 160 mV VCC = +3 V, Vid = -100 mV, RL = 600 Ω 5
Low level output voltage VOL 120 mV VCC = +3 V, Vid = -100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 2 kΩ 5
Low level output voltage VOL 160 mV VCC = +3 V, Vid = -100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 600 Ω 5
Output source current Io 20 80 mA VCC = +3 V, Vid = 100 mV, VO = VDD 5
Output sink current Io 20 80 mA VCC = +3 V, Vid = -100 mV, VO = VCC 5
Supply current (per amplifier) ICC 420 650 µA VCC = +3 V, AVCL = 1, no load 5
Supply current (per amplifier) ICC 690 µA VCC = +3 V, Tmin ≤ Tamb ≤ Tmax, AVCL = 1, no load 5
Gain bandwidth product GBP 1 1.3 MHz VCC = +3 V, RL = 10 kΩ, CL = 100 pF, f = 100 kHz 5
Slew rate SR 0.42 0.6 V/µs VCC = +3 V, RL = 10 kΩ, CL = 100 pF 5
Input offset voltage Vio 0.2 3 mV VCC = +5 V, Vicm = Vout = VCC /2 6
Input offset voltage Vio 6 mV VCC = +5 V, Tmin ≤ Tamb ≤ Tmax 6
Input offset current Iio 3 30 nA VCC = +5 V, Vicm = Vout = VCC /2 6
Input offset current Iio 60 nA VCC = +5 V, Tmin ≤ Tamb ≤ Tmax 6
Input bias current Iib 70 130 VCC = +5 V, Vicm = Vout = VCC /2 6
Input bias current Iib 150 VCC = +5 V, Tmin ≤ Tamb ≤ Tmax 6
Common mode rejection ratio CMR 65 85 dB VCC = +5 V, 0 ≤ Vicm ≤ VCC, Vout = VCC /2 6
Supply voltage rejection ratio SVR 70 90 dB VCC = +5 V, VCC = 2.5 V to 5 V 6
Large signal voltage gain Avd 83 92 VCC = +5 V, Vout = 0.5 V to 4.5 V, RL = 2 kΩ 6
Large signal voltage gain Avd 77 85 VCC = +5 V, Vout = 0.5 V to 4.5 V, RL = 600 Ω 6
High level output voltage VOH 4.8 4.95 V VCC = +5 V, Vid = 100 mV, RL = 2 kΩ 6
High level output voltage VOH 4.75 4.9 V VCC = +5 V, Vid = 100 mV, RL = 600 Ω 6
High level output voltage VOH 4.8 V VCC = +5 V, Vid = 100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 2 kΩ 6
High level output voltage VOH 4.75 V VCC = +5 V, Vid = 100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 600 Ω 6
Low level output voltage VOL 88 130 mV VCC = +5 V, Vid = -100 mV, RL = 2 kΩ 6
Low level output voltage VOL 115 188 mV VCC = +5 V, Vid = -100 mV, RL = 600 Ω 6
Low level output voltage VOL 130 mV VCC = +5 V, Vid = -100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 2 kΩ 6
Low level output voltage VOL 188 mV VCC = +5 V, Vid = -100 mV, Tmin ≤ Tamb ≤ Tmax, RL = 600 Ω 6
Output source current Io 20 80 mA VCC = +5 V, Vid = 100 mV, VO = VDD 6
Output sink current Io 20 80 mA VCC = +5 V, Vid = -100 mV, VO = VCC 6
Supply current (per amplifier) ICC 500 835 µA VCC = +5 V, AVCL = 1, no load 6
Supply current (per amplifier) ICC 875 µA VCC = +5 V, Tmin ≤ Tamb ≤ Tmax, AVCL = 1, no load 6
Gain bandwidth product GBP 1 1.4 MHz VCC = +5 V, RL = 10 kΩ, CL = 100 pF, f = 100 kHz 6
Slew rate SR 0.42 0.6 V/µs VCC = +5 V, RL = 10 kΩ, CL = 100 pF 6

CAD (KiCad official)

  • Symbol: TSV358IPT
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: tsv358ipt-etched.step / tsv358ipt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tsv358ipt.step / tsv358ipt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (21 pp, sha256 21a84d3a9300848f, retrieved 2026-10-21, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF