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TSS521DR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# TSS521DR++**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOIC-16++TSS521DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BUSL2 | passive | Meter-Bus connection, polarity independent through the input rectifier bridge BR; bus voltage is 10.8 V to 42 V for the receiver and 12 V to 42 V for the transmitter. |+| 2 | VB | power_in | Differential bus voltage after the rectifier, referenced to GND and monitored by comparator TC2 for power fail; the rectifier drop ΔVBR is 1.5 V max at IBUS = 3 mA. |+| 3 | STC | passive | Support capacitor pin where storage capacitor CSTC is charged by a constant current and limited to REF1; the VDD turn-on and turn-off thresholds are monitored here. |+| 4 | RIDD | passive | Current adjustment input; resistor RRIDD sets the STC charge current, with 13 kΩ to 80 kΩ recommended and VRIDD of 1.23 V to 1.33 V at RRIDD = 30 kΩ. |+| 5 | PF | output | Power-fail output that is high when VVB > VSTC + 0.6 V and goes low (power fail) to warn the microcontroller of a critical voltage drop so it can save data immediately. |+| 6 | SC | passive | Sampling capacitor pin that provides the dynamic reference level for comparator TC3, with a charge current of −15 µA to −40 µA. |+| 7 | TXI | output | Inverted data output; VOH is at least VBAT − 0.6 V at −100 µA and VOL is 0.5 V max at 100 µA. |+| 8 | TX | output | Noninverted data output that also repeats the receiver modulation as ECHO; VOH is at least VBAT − 0.6 V at −100 µA and VOL is 0.5 V max at 100 µA. |+| 9 | BAT | power_in | Logic level adjust input supplied from the battery, with 2.5 V to 3.8 V recommended and VBAT(max) ≤ VSTC − 1 V. |+| 10 | VS | power_out | Switch output for bus or battery supply, synchronized with VDD; VVS is at least VSTC − 0.4 V at IVS = −5 µA when VDD is on, and it drives an external transistor (BSS84) to switch to battery. |+| 11 | VDD | power_out | Voltage regulator output at 3.3 V nominal; VVDD is 3.1 V to 3.4 V at −IVDD = 1 mA with VSTC = 6.5 V. |+| 12 | RX | input | Noninverted data input that controls the slave-to-master current source CS3; VIH is up to 5.5 V only when VSTC ≥ 6.5 V and VIL is 0.8 V max. |+| 13 | RXI | input | Inverted data input that controls the slave-to-master current source CS3; VIH is up to 5.5 V only when VSTC ≥ 6.5 V and VIL is 0.8 V max. |+| 14 | RIS | passive | Adjust input for modulation current; programming resistor RRIS of at least 100 Ω sets the current, with VRIS of 1.4 V to 1.7 V at 100 Ω. |+| 15 | GND | power_in | Ground reference; all voltage values in the datasheet are measured with respect to this terminal. |+| 16 | BUSL1 | passive | Meter-Bus connection, polarity independent through the input rectifier bridge BR; bus voltage is 10.8 V to 42 V for the receiver and 12 V to 42 V for the transmitter. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `TSS521DR`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `tss521dr-etched.step` / `tss521dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tss521dr.step` / `tss521dr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tss521.pdf) (15 pp, sha256 `fa7ed42a397edb3a`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tss521dr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "tss521dr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tss521dr.kicad_sym",+ "tss521dr.kicad_mod",+ "tss521dr.glb",+ "tss521dr.step",+ "tss521dr.lbr",+ "docs/hero.png",+ "docs/tss521dr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tss521dr-hero.glb",+ "tss521dr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TSS521DR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Buffers, Drivers, Receivers, Transceivers",+ "datasheet": "https://www.ti.com/lit/ds/symlink/tss521.pdf",+ "parts": {+ "symbol": "tss521dr.kicad_sym",+ "footprint": "tss521dr.kicad_mod",+ "model_3d": "tss521dr-hero.glb",+ "model_3d_plain": "tss521dr.glb",+ "model_3d_step": "tss521dr-etched.step",+ "model_3d_step_plain": "tss521dr.step",+ "lbr": "tss521dr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2859718",+ "digikey": "296-50177-2-ND",+ "mouser": "595-TSS521DR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T20:08:11Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-50177-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TSS521DR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "BUSL2",+ "type": "passive",+ "description": "Meter-Bus connection, polarity independent through the input rectifier bridge BR; bus voltage is 10.8 V to 42 V for the receiver and 12 V to 42 V for the transmitter."+ },+ {+ "number": "2",+ "name": "VB",+ "type": "power_in",+ "description": "Differential bus voltage after the rectifier, referenced to GND and monitored by comparator TC2 for power fail; the rectifier drop ΔVBR is 1.5 V max at IBUS = 3 mA."+ },+ {+ "number": "3",+ "name": "STC",+ "type": "passive",+ "description": "Support capacitor pin where storage capacitor CSTC is charged by a constant current and limited to REF1; the VDD turn-on and turn-off thresholds are monitored here."+ },+ {+ "number": "4",+ "name": "RIDD",+ "type": "passive",+ "description": "Current adjustment input; resistor RRIDD sets the STC charge current, with 13 kΩ to 80 kΩ recommended and VRIDD of 1.23 V to 1.33 V at RRIDD = 30 kΩ."+ },+ {+ "number": "5",+ "name": "PF",+ "type": "output",+ "description": "Power-fail output that is high when VVB > VSTC + 0.6 V and goes low (power fail) to warn the microcontroller of a critical voltage drop so it can save data immediately."+ },+ {+ "number": "6",+ "name": "SC",+ "type": "passive",+ "description": "Sampling capacitor pin that provides the dynamic reference level for comparator TC3, with a charge current of −15 µA to −40 µA."+ },+ {+ "number": "7",+ "name": "TXI",+ "type": "output",+ "description": "Inverted data output; VOH is at least VBAT − 0.6 V at −100 µA and VOL is 0.5 V max at 100 µA."+ },+ {+ "number": "8",+ "name": "TX",+ "type": "output",+ "description": "Noninverted data output that also repeats the receiver modulation as ECHO; VOH is at least VBAT − 0.6 V at −100 µA and VOL is 0.5 V max at 100 µA."+ },+ {+ "number": "9",+ "name": "BAT",+ "type": "power_in",+ "description": "Logic level adjust input supplied from the battery, with 2.5 V to 3.8 V recommended and VBAT(max) ≤ VSTC − 1 V."+ },+ {+ "number": "10",+ "name": "VS",+ "type": "power_out",+ "description": "Switch output for bus or battery supply, synchronized with VDD; VVS is at least VSTC − 0.4 V at IVS = −5 µA when VDD is on, and it drives an external transistor (BSS84) to switch to battery."+ },+ {+ "number": "11",+ "name": "VDD",+ "type": "power_out",+ "description": "Voltage regulator output at 3.3 V nominal; VVDD is 3.1 V to 3.4 V at −IVDD = 1 mA with VSTC = 6.5 V."+ },+ {+ "number": "12",+ "name": "RX",+ "type": "input",+ "description": "Noninverted data input that controls the slave-to-master current source CS3; VIH is up to 5.5 V only when VSTC ≥ 6.5 V and VIL is 0.8 V max."+ },+ {+ "number": "13",+ "name": "RXI",+ "type": "input",+ "description": "Inverted data input that controls the slave-to-master current source CS3; VIH is up to 5.5 V only when VSTC ≥ 6.5 V and VIL is 0.8 V max."+ },+ {+ "number": "14",+ "name": "RIS",+ "type": "passive",+ "description": "Adjust input for modulation current; programming resistor RRIS of at least 100 Ω sets the current, with VRIS of 1.4 V to 1.7 V at 100 Ω."+ },+ {+ "number": "15",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference; all voltage values in the datasheet are measured with respect to this terminal."+ },+ {+ "number": "16",+ "name": "BUSL1",+ "type": "passive",+ "description": "Meter-Bus connection, polarity independent through the input rectifier bridge BR; bus voltage is 10.8 V to 42 V for the receiver and 12 V to 42 V for the transmitter."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: BAT is described only as a logic level adjust input with a battery voltage range; classified as powe; Meter-Bus pins are described by function and bus voltage range only; 'passive' was chosen since the ; Analog/timing pins (VB, STC, RIDD, SC, RIS) are described by function only; 'passive' is a judgment "+ ],+ "pages_sent": 15,+ "cost_usd": 0.0707,+ "at": "2026-10-08T20:07:51"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/tss521.pdf",+ "pages": 15,+ "sha256": "fa7ed42a397edb3a",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tss521dr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tss521dr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f6a36eef29fa6164246109fda19b8d8c3f85e6ddb76cb90238e59d7586e3ebbc",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}