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TSB611IYLT

Public Made by Adom

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STMicroelectronics Operational Amplifier, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TSB611IYLT

STMicroelectronics · Operational Amplifier · SOT-23-5

TSB611IYLT from STMicroelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Op amp output with rail-to-rail swing, within 100 mV max of the positive rail and 110 mV max of the negative rail into 10 kΩ at 36 V supply.
2 VCC- power_in Negative supply (ground in single-supply use); the supply voltage VCC+ to VCC- must be 2.7 V to 36 V (40 V absolute max).
3 IN+ input Non-inverting input; common-mode range extends from (VCC-) - 0.1 V to (VCC+) - 1 V and input current must be limited to 10 mA.
4 IN- input Inverting input; common-mode range extends from (VCC-) - 0.1 V to (VCC+) - 1 V and input current must be limited to 10 mA.
5 VCC+ power_in Positive supply, 2.7 V to 36 V operating (40 V absolute max), with a 22 nF bypass capacitor recommended close to the supply pins.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOT-23-5
Category Operational Amplifier/Comparator
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage Vio -1 1 mV Vcc+ = 2.7 V, Tamb = 25 °C 4
Input offset voltage over temperature Vio -1.6 1.6 mV Vcc+ = 2.7 V, -40 °C < T< 125 °C 4
Input offset voltage drift ΔVio/ΔT 1.8 6 μV/°C Vcc+ = 2.7 V, -40 °C < T< 125 °C 4
Input offset current Iio 1 5 nA Vcc+ = 2.7 V 4
Input bias current Iib 5 10 nA Vcc+ = 2.7 V 4
Common mode rejection ratio CMR 90 115 dB Vcc+ = 2.7 V, Vicm = 0 V to Vcc+ -1 V, Vout = Vcc/2 4
Large signal voltage gain (TSB611) Avd 98 102 dB Vcc+ = 2.7 V, Vout = 0.5 V to (Vcc+ - 0.5 V) 4
High level output voltage (drop from Vcc+) VOH 13 25 mV Vcc+ = 2.7 V 4
Low level output voltage VOL 26 30 mV Vcc+ = 2.7 V 4
Output sink current Isink 13 20 mA Vcc+ = 2.7 V, Vout = Vcc 4
Output source current Isource 20 28 mA Vcc+ = 2.7 V, Vout = 0 V 4
Supply current (per channel) ICC 92 110 µA Vcc+ = 2.7 V, No load, Vout = Vcc/2 4
Supply current (per channel) over temperature ICC 125 µA Vcc+ = 2.7 V, -40 °C < T< 125 °C 4
Positive slew rate SR+ 0.13 0.18 V/μs Vcc+ = 2.7 V, RL = 10 kΩ, CL = 100 pF, Vout = 0.5 V to VCC - 0.5 V 4
Input offset voltage Vio -1 1 mV Vcc+ = 12 V, Tamb = 25 °C 6
Input offset voltage over temperature Vio -1.6 1.6 mV Vcc+ = 12 V, -40 °C < T< 125 °C 6
Input offset voltage drift ΔVio/ΔT 1.6 6 μV/°C Vcc+ = 12 V, -40 °C < T< 125 °C 6
Input offset current Iio 1 5 nA Vcc+ = 12 V 6
Input bias current Iib 5 10 nA Vcc+ = 12 V 6
Common mode rejection ratio CMR 95 126 dB Vcc+ = 12 V, Vicm = 0 V to Vcc+ - 1 V, Vout = Vcc/2 6
Supply voltage rejection ratio SVR 95 124 dB Vcc = 2.8 to 12 V 6
Large signal voltage gain Avd 105 115 dB Vcc+ = 12 V, Vout = 0.5 V to (Vcc+ - 0.5 V) 6
High level output voltage drop from Vcc+ VOH 37 60 mV Vcc+ = 12 V 6
Low level output voltage VOL 56 65 mV Vcc+ = 12 V 6
Output sink current Isink 24 35 mA Vcc+ = 12 V, Vout = Vcc 6
Output source current Isource 28 40 mA Vcc+ = 12 V, Vout = 0 V 6
Supply current (per channel) ICC 97 115 µA Vcc+ = 12 V, No load, Vout = Vcc/2 6
Supply current (per channel) over temperature ICC 130 µA Vcc+ = 12 V, -40 °C < T< 125 °C 6
Positive slew rate SR+ 0.13 0.19 V/μs Vcc+ = 12 V, RL = 10 kΩ, CL = 100 pF, Vout = 0.5 V to VCC - 0.5 V 6
Input offset voltage Vio -1 1 mV Vcc+ = 36 V, Tamb = 25 °C 8
Input offset voltage over temperature Vio -1.6 1.6 mV Vcc+ = 36 V, -40 °C < T< 125 °C 8
Input offset voltage drift ΔVio/ΔT 1.3 6 μV/°C Vcc+ = 36 V, -40 °C < T< 125 °C 8
Input offset current Iio 1 5 nA Vcc+ = 36 V 8
Input bias current Iib 5 10 nA Vcc+ = 36 V 8
Common mode rejection ratio CMR 105 130 dB Vcc+ = 36 V, Vicm = 0 V to Vcc+ - 1 V, Vout = Vcc/2 8
Supply voltage rejection ratio SVR 100 124 dB Vcc = 12 to 36 V 8
Large signal voltage gain Avd 110 120 dB Vcc+ = 36 V, Vout = 0.5 V to (Vcc+ - 0.5 V) 8
High level output voltage drop from VCC+ VOH 80 110 mV Vcc+ = 36 V 8
Low level output voltage VOL 90 110 mV Vcc+ = 36 V 8
Output sink current Isink 40 60 mA Vcc+ = 36 V, Vout = Vcc 8
Output source current Isource 40 70 mA Vcc+ = 36 V, Vout = 0 V 8
Supply current (per channel) ICC 103 125 µA Vcc+ = 36 V, No load, Vout = Vcc/2 8
Supply current (per channel) over temperature ICC 140 µA Vcc+ = 36 V, -40 °C < T< 125 °C 8
Positive slew rate SR+ 0.15 0.2 V/μs Vcc+ = 36 V, RL = 10 kΩ, CL = 100 pF, Vout = 0.5 V to VCC - 0.5 V 8
Supply voltage Vcc 40 V 3
Input current Iin 10 mA Must be limited by a series resistor 3
Storage temperature Tstg -65 150 °C 3
Maximum junction temperature Tj 150 °C 3
ESD HBM ESD 4000 V Human body model 3
ESD CDM ESD 1500 V Charged device model 3
Latch-up immunity 200 mA 3
Thermal resistance junction to ambient Rthja 250 °C/W SOT23-5, typical value 3
Supply voltage (operating) Vcc 2.7 36 V 3
Operating free air temperature range Toper -40 125 °C 3

CAD (KiCad official)

  • Symbol: TSB611IYLT
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tsb611iylt-etched.step / tsb611iylt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tsb611iylt.step / tsb611iylt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (23 pp, sha256 f984d54d8426f33f, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF