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Contents

README

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TS974IPT

STMicroelectronics · Operational Amplifier · TSSOP-14

TS974IPT from STMicroelectronics, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Output 1 output Op-amp 1 output. Rail-to-rail output stage swings within ~100 mV of VDD/VCC; short-circuit protected.
2 Inverting input 1 input Op-amp 1 inverting input (IN−). Common-mode range VDD+1.15 V to VCC−1.15 V; do not exceed VDD−0.3 V or VCC+0.3 V.
3 Non-inverting input 1 input Op-amp 1 non-inverting input (IN+). Same input constraints as IN−.
4 VCC power_in Positive supply. Operating range 2.7 V to 10 V single-supply (or up to ±5 V split-supply). Absolute max 12 V.
5 Non-inverting input 2 input Op-amp 2 non-inverting input (IN+).
6 Inverting input 2 input Op-amp 2 inverting input (IN−).
7 Output 2 output Op-amp 2 output. Rail-to-rail; short-circuit protected.
8 Output 3 output Op-amp 3 output. Rail-to-rail; short-circuit protected.
9 Inverting input 3 input Op-amp 3 inverting input (IN−).
10 Non-inverting input 3 input Op-amp 3 non-inverting input (IN+).
11 VDD power_in Negative supply / ground reference. Tie to GND for single-supply operation, or to the negative rail for split-supply operation.
12 Non-inverting input 4 input Op-amp 4 non-inverting input (IN+).
13 Inverting input 4 input Op-amp 4 inverting input (IN−).
14 Output 4 output Op-amp 4 output. Rail-to-rail; short-circuit protected.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TSSOP-14
Category Op-amp/Cmp
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • TS974IPT
  • TS974IPTIYPT
  • TS974IPTIDT
  • TS974IPTILT
  • TS974IPTIYLT
  • TS974IPTIYDT
  • TS974IPTIQT
  • TS974IPTIYQT

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2.7 10 V 5
Operating free air temperature range Toper -40 125 °C 5
Common mode input voltage range Vicm -1.35 1.35 V 6
Input offset voltage Vio 1 5 mV 6
Input offset voltage over temperature Vio 7 mV Tmin ≤ Tamb ≤ Tmax 6
Input offset current Iio 10 150 nA Vicm = 0 V, Vo = 0 V 6
Input bias current Iib 200 750 nA Vicm = 0 V, Vo = 0 V 6
Input bias current over temperature Iib 200 1000 nA Tmin ≤ Tamb ≤ Tmax 6
Common mode rejection ratio CMR 60 85 dB Vicm = ±1.35 V 6
Supply voltage rejection ratio SVR 60 70 dB VCC = ±2 V to ±3 V 6
Large signal voltage gain Avd 70 80 RL = 2 kΩ 6
High-level output voltage VOH 2 2.4 V 6
Low-level output voltage VOL -2.4 -2 V 6
Output source current Isource 1.5 6
Output sink current Isink 100 mA 6
Supply current per amplifier ICC 2 2.8 Unity gain, no load 6
Gain bandwidth product GBP 8.5 12 MHz f = 100 kHz, RL = 2 kΩ, CL = 100 pF 6
Slew rate SR 2.8 4 V/µs AV = 1, Vin = ±1 V 6
Phase margin at unit gain ∅m 60 Degrees RL = 2 kΩ, CL = 100 pF 6
Gain margin Gm 10 dB 6
Differential input voltage Vid -1 1 V 4
Supply voltage VCC 12 V 4
Storage temperature range Tstg -65 150 °C 4
Maximum junction temperature Tj 150 °C 4
Lead temperature 260 °C soldering, 10 sec. 4
ESD HBM: human body model 2 kV Human body model 4
ESD MM: machine model 200 V Machine model 4
ESD CDM: charged device model 1.5 kV Charged device model 4
Thermal resistance junction-to-ambient (TSSOP14) Rthja 100 °C/W Junction-to-ambient; values are typical per note 4 4
Thermal resistance junction-to-case (TSSOP14) Rthjc 32 °C/W Junction-to-case; values are typical per note 4 4
Input offset voltage drift ΔVio/ΔT 5 µV/°C Vicm = 0 V, Vo = 0 V 6
Equivalent input noise voltage en 4 nV/√Hz f = 100 kHz 6
Equivalent input noise current in 250 fA/√Hz f = 1 kHz 6
Total harmonic distortion THD 0.003 % f = 1 kHz, AV = -1, RL = 10 kΩ 6

CAD (KiCad official)

  • Symbol: TS974IPT
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: ts974ipt-etched.step / ts974ipt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ts974ipt.step / ts974ipt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (18 pp, sha256 8cf0a37b91551215, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF