# TS555IDTTR

**STMicroelectronics** · Timers / Clock Oscillators · SO-8

TS555IDTTR from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground / negative supply reference (0 V). |
| 2 | Trigger | input | Trigger input. A falling edge below 1/3 Vcc sets the internal flip-flop and drives the Output high, starting a timing cycle. High input impedance CMOS input (~10^12 Ω). |
| 3 | Output | output | Push-pull CMOS timer output, compatible with TTL, CMOS and logic MOS loads. Rated for ±100 mA absolute max; recommended operating sink 10 mA / source 50 mA. |
| 4 | Reset | input | Active-low reset. Driving this pin low forces the Output low regardless of Trigger/Threshold state; must be tied high (typically to Vcc) when not used. |
| 5 | Control Voltage | input | Control voltage input, internally biased to 2/3 Vcc via the resistor divider. Allows external override of the internal threshold/trigger reference; typically decoupled to GND with a 10 nF capacitor when unused. |
| 6 | Threshold | input | Threshold comparator input. When the voltage on this pin rises above 2/3 Vcc (or the Control Voltage reference), the internal flip-flop is reset and the Output goes low. High-impedance CMOS input. |
| 7 | Discharge | output | Open-drain discharge pin, tied to the drain of an internal NMOS whose source is at GND. Used to discharge the external timing capacitor when the internal flip-flop is reset. |
| 8 | VCC | power_in | Positive supply, +2 V to +16 V operating range (absolute max +18 V). Typical Icc = 110 µA at Vcc = +5 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | RTC |
| Pins | 8 |

## Ordering variants

Same part, different packaging or reel option.

- `TS555IDTTR`

## CAD (KiCad official)

- Symbol: `TS555IDTTR`
- Footprint: `Package_SO:TI_SO-PowerPAD-8`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `ts555idttr-etched.step` / `ts555idttr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ts555idttr.step` / `ts555idttr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/ts555idttr.pdf) (19 pp, sha256 `d77d351cf231d8c7`, retrieved 2026-08-17, tier: manufacturer)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ts555idttr-datasheet.pdf)