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TS507ILT
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STMicroelectronics Operational Amplifier, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ts507ilt: specified limits as data (metadata.characteristics, 58 rows from the datasheet)
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TS507ILT
STMicroelectronics · Operational Amplifier · SOT-23-5
TS507ILT from STMicroelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Amplifier output with rail-to-rail swing between VDD and VCC; output drive limits are given in Table 3 of the datasheet. |
| 2 | VDD | power_in | Negative supply rail and 0 V reference for the device; all input and output voltages are referenced to this pin. |
| 3 | Non Inverting Input | input | Non-inverting input; common-mode range is VDD to VCC and the input voltage must stay between VDD-0.3 V and VCC+0.3 V. |
| 4 | Inverting Input | input | Inverting input; common-mode range is VDD to VCC and the input voltage must stay between VDD-0.3 V and VCC+0.3 V. |
| 5 | VCC | power_in | Positive supply, operating from 2.7 V to 5.5 V above VDD, with an absolute maximum of 6 V relative to VDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOT-23-5 |
| Category | Amplifiers/Comparators |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VCC | 6 | V | Value with respect to VDD pin | 3 | ||
| Differential input voltage (absolute maximum) | Vid | -2.5 | 2.5 | V | 3 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Maximum junction temperature | Tj | 150 | °C | 3 | |||
| ESD human body model | 5 | kV | HBM | 3 | |||
| ESD machine model | 300 | V | MM | 3 | |||
| ESD charged device model | 2 | kV | CDM | 3 | |||
| Supply voltage (recommended operating) | VCC | 2.7 | 5.5 | V | Value with respect to VDD pin | 3 | |
| Differential input voltage (recommended operating) | Vid | -2.5 | 2.5 | V | 3 | ||
| Operating free air temperature range (TS507I) | Toper | -40 | 125 | °C | TS507I grade | 3 | |
| Input offset voltage | Vio | 25 | 100 | µV | VCC=+5 V; Vicm = 0 to 3.8 V, T=25 °C | 4 | |
| Input offset voltage | Vio | 400 | µV | VCC=+5 V; Vicm = 0 to 3.8 V, TS507I full temperature range | 4 | ||
| Input offset voltage | Vio | 450 | µV | VCC=+5 V; Vicm = 0 V to 5 V, T=25 °C | 4 | ||
| Input offset voltage | Vio | 750 | µV | VCC=+5 V; Vicm = 0 V to 5 V, TS507I full temperature range | 4 | ||
| Input bias current | Iib | 8 | 70 | nA | VCC=+5 V; T = 25 °C | 4 | |
| Input bias current | Iib | 110 | nA | VCC=+5 V; TS507I full temperature range | 4 | ||
| Input offset current | Iio | 2 | 25 | nA | VCC=+5 V; T = 25 °C | 4 | |
| Input offset current | Iio | 50 | nA | VCC=+5 V; TS507I full temperature range | 4 | ||
| Common mode rejection ratio | CMRR | 94 | 115 | dB | VCC=+5 V; 20 log (ΔVicm/ΔVio), Vicm from 0 V to 3.8 V, T=25 °C | 4 | |
| Common mode rejection ratio | CMRR | 91 | dB | VCC=+5 V; Vicm from 0 V to 3.8 V, TS507I full temperature range | 4 | ||
| Common mode rejection ratio | CMRR | 96 | dB | VCC=+5 V; Vicm from 0 V to 5 V | 4 | ||
| Power supply rejection ratio | PSRR | 91 | 105 | dB | VCC=+5 V; VCC from 2.7 V to 5.5 V, Vicm=Vcc/2, T=25 °C | 4 | |
| Power supply rejection ratio | PSRR | 89 | dB | VCC=+5 V; VCC from 2.7 V to 5.5 V, Vicm=Vcc/2, TS507I full temperature range | 4 | ||
| Large signal voltage gain | Avd | 98 | 131 | dB | VCC=+5 V; RL = 10 kΩ, Vout= 0.5 V to 4.5 V, full temperature range | 4 | |
| High level output voltage drop | VCC-VOH | 67 | 95 | mV | VCC=+5 V; RL = 600 Ω, T=25 °C | 4 | |
| High level output voltage drop | VCC-VOH | 120 | mV | VCC=+5 V; RL = 600 Ω, TS507I full temperature range | 4 | ||
| High level output voltage drop | VCC-VOH | 4 | 15 | mV | VCC=+5 V; RL = 10 kΩ, T=25 °C | 4 | |
| High level output voltage drop | VCC-VOH | 15 | mV | VCC=+5 V; RL = 10 kΩ, full temperature range | 4 | ||
| Low level output voltage | VOL | 64 | 90 | mV | VCC=+5 V; RL = 600 Ω, T=25 °C | 4 | |
| Low level output voltage | VOL | 125 | mV | VCC=+5 V; RL = 600 Ω, TS507I full temperature range | 4 | ||
| Low level output voltage | VOL | 4 | 15 | mV | VCC=+5 V; RL = 10 kΩ, T=25 °C | 4 | |
| Low level output voltage | VOL | 15 | mV | VCC=+5 V; RL = 10 kΩ, full temperature range | 4 | ||
| Output sink current | Isink | 74 | 104 | mA | VCC=+5 V; Vout = VCC, Vid=-1 V, T=25 °C | 5 | |
| Output sink current | Isink | 53 | mA | VCC=+5 V; Vout = VCC, Vid=-1 V, TS507I full temperature range | 5 | ||
| Output source current | Isource | 90 | 128 | mA | VCC=+5 V; Vout = VDD, Vid=1 V, T=25 °C | 5 | |
| Output source current | Isource | 70 | mA | VCC=+5 V; Vout = VDD, Vid=1 V, TS507I full temperature range | 5 | ||
| Supply current (per operator) | ICC | 0.85 | 1.15 | mA | VCC=+5 V; No load, Vout=VCC/2, Vicm=0 to 5 V, T=25 °C | 5 | |
| Supply current (per operator) | ICC | 1.25 | mA | VCC=+5 V; No load, Vout=VCC/2, Vicm=0 to 5 V, full temperature range | 5 | ||
| Input offset voltage | Vio | 400 | µV | VCC=+3.3 V; Vicm = 0 to 2.1 V, TS507I full temperature range | 6 | ||
| Input offset voltage | Vio | 750 | µV | VCC=+3.3 V; Vicm = 0 V to 3.3 V, TS507I full temperature range | 6 | ||
| Input bias current | Iib | 145 | nA | VCC=+3.3 V; TS507I full temperature range | 6 | ||
| Supply current (per operator) | ICC | 0.81 | 1.1 | mA | VCC=+3.3 V; No load, Vout=VCC/2, Vicm=0 to 3.3 V, T=25 °C | 6 | |
| Supply current (per operator) | ICC | 1.2 | mA | VCC=+3.3 V; No load, Vout=VCC/2, Vicm=0 to 3.3 V, full temperature range | 6 | ||
| High level output voltage drop | VCC-VOH | 110 | mV | VCC=+3.3 V; RL = 600 Ω, TS507I full temperature range | 6 | ||
| Low level output voltage | VOL | 115 | mV | VCC=+3.3 V; RL = 600 Ω, TS507I full temperature range | 6 | ||
| Output sink current | Isink | 22 | mA | VCC=+3.3 V; Vout = VCC, Vid=-1 V, TS507I full temperature range | 6 | ||
| Output source current | Isource | 29 | mA | VCC=+3.3 V; Vout = VDD, Vid=1 V, TS507I full temperature range | 6 | ||
| Input offset voltage | Vio | 400 | µV | VCC=+2.7 V; Vicm = 0 to 1.9 V, TS507I full temperature range | 8 | ||
| Input offset voltage | Vio | 750 | µV | VCC=+2.7 V; Vicm = 0 V to 2.7 V, TS507I full temperature range | 8 | ||
| Input bias current | Iib | 160 | nA | VCC=+2.7 V; TS507I full temperature range | 8 | ||
| Supply current (per operator) | ICC | 0.79 | 1.1 | mA | VCC=+2.7 V; No load, Vout=VCC/2, Vicm=0 to 2.7 V, T=25 °C | 8 | |
| Supply current (per operator) | ICC | 1.2 | mA | VCC=+2.7 V; No load, Vout=VCC/2, Vicm=0 to 2.7 V, full temperature range | 8 | ||
| High level output voltage drop | VCC-VOH | 105 | mV | VCC=+2.7 V; RL = 600 Ω, TS507I full temperature range | 8 | ||
| Low level output voltage | VOL | 115 | mV | VCC=+2.7 V; RL = 600 Ω, TS507I full temperature range | 8 | ||
| Output sink current | Isink | 13 | mA | VCC=+2.7 V; Vout = VCC, Vid=-1 V, TS507I full temperature range | 8 | ||
| Output source current | Isource | 17 | mA | VCC=+2.7 V; Vout = VDD, Vid=1 V, TS507I full temperature range | 8 | ||
| Thermal resistance junction to ambient (SOT23-5) | Rthja | 250 | °C/W | SOT23-5; Rthja/c are typical values | 3 | ||
| Thermal resistance junction to case (SOT23-5) | Rthjc | 81 | °C/W | SOT23-5; Rthja/c are typical values | 3 |
CAD (KiCad official)
- Symbol:
TS507ILT - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
ts507ilt-etched.step/ts507ilt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ts507ilt.step/ts507ilt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (20 pp, sha256
e953185acc092953, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TS507ILT
**STMicroelectronics** · Operational Amplifier · SOT-23-5
TS507ILT from STMicroelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Amplifier output with rail-to-rail swing between VDD and VCC; output drive limits are given in Table 3 of the datasheet. |
| 2 | VDD | power_in | Negative supply rail and 0 V reference for the device; all input and output voltages are referenced to this pin. |
| 3 | Non Inverting Input | input | Non-inverting input; common-mode range is VDD to VCC and the input voltage must stay between VDD-0.3 V and VCC+0.3 V. |
| 4 | Inverting Input | input | Inverting input; common-mode range is VDD to VCC and the input voltage must stay between VDD-0.3 V and VCC+0.3 V. |
| 5 | VCC | power_in | Positive supply, operating from 2.7 V to 5.5 V above VDD, with an absolute maximum of 6 V relative to VDD. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOT-23-5 |
| Category | Amplifiers/Comparators |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VCC | | | 6 | V | Value with respect to VDD pin | 3 |
| Differential input voltage (absolute maximum) | Vid | -2.5 | | 2.5 | V | | 3 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 3 |
| Maximum junction temperature | Tj | | | 150 | °C | | 3 |
| ESD human body model | | | | 5 | kV | HBM | 3 |
| ESD machine model | | | | 300 | V | MM | 3 |
| ESD charged device model | | | | 2 | kV | CDM | 3 |
| Supply voltage (recommended operating) | VCC | 2.7 | | 5.5 | V | Value with respect to VDD pin | 3 |
| Differential input voltage (recommended operating) | Vid | -2.5 | | 2.5 | V | | 3 |
| Operating free air temperature range (TS507I) | Toper | -40 | | 125 | °C | TS507I grade | 3 |
| Input offset voltage | Vio | | 25 | 100 | µV | VCC=+5 V; Vicm = 0 to 3.8 V, T=25 °C | 4 |
| Input offset voltage | Vio | | | 400 | µV | VCC=+5 V; Vicm = 0 to 3.8 V, TS507I full temperature range | 4 |
| Input offset voltage | Vio | | | 450 | µV | VCC=+5 V; Vicm = 0 V to 5 V, T=25 °C | 4 |
| Input offset voltage | Vio | | | 750 | µV | VCC=+5 V; Vicm = 0 V to 5 V, TS507I full temperature range | 4 |
| Input bias current | Iib | | 8 | 70 | nA | VCC=+5 V; T = 25 °C | 4 |
| Input bias current | Iib | | | 110 | nA | VCC=+5 V; TS507I full temperature range | 4 |
| Input offset current | Iio | | 2 | 25 | nA | VCC=+5 V; T = 25 °C | 4 |
| Input offset current | Iio | | | 50 | nA | VCC=+5 V; TS507I full temperature range | 4 |
| Common mode rejection ratio | CMRR | 94 | 115 | | dB | VCC=+5 V; 20 log (ΔVicm/ΔVio), Vicm from 0 V to 3.8 V, T=25 °C | 4 |
| Common mode rejection ratio | CMRR | 91 | | | dB | VCC=+5 V; Vicm from 0 V to 3.8 V, TS507I full temperature range | 4 |
| Common mode rejection ratio | CMRR | 96 | | | dB | VCC=+5 V; Vicm from 0 V to 5 V | 4 |
| Power supply rejection ratio | PSRR | 91 | 105 | | dB | VCC=+5 V; VCC from 2.7 V to 5.5 V, Vicm=Vcc/2, T=25 °C | 4 |
| Power supply rejection ratio | PSRR | 89 | | | dB | VCC=+5 V; VCC from 2.7 V to 5.5 V, Vicm=Vcc/2, TS507I full temperature range | 4 |
| Large signal voltage gain | Avd | 98 | 131 | | dB | VCC=+5 V; RL = 10 kΩ, Vout= 0.5 V to 4.5 V, full temperature range | 4 |
| High level output voltage drop | VCC-VOH | | 67 | 95 | mV | VCC=+5 V; RL = 600 Ω, T=25 °C | 4 |
| High level output voltage drop | VCC-VOH | | | 120 | mV | VCC=+5 V; RL = 600 Ω, TS507I full temperature range | 4 |
| High level output voltage drop | VCC-VOH | | 4 | 15 | mV | VCC=+5 V; RL = 10 kΩ, T=25 °C | 4 |
| High level output voltage drop | VCC-VOH | | | 15 | mV | VCC=+5 V; RL = 10 kΩ, full temperature range | 4 |
| Low level output voltage | VOL | | 64 | 90 | mV | VCC=+5 V; RL = 600 Ω, T=25 °C | 4 |
| Low level output voltage | VOL | | | 125 | mV | VCC=+5 V; RL = 600 Ω, TS507I full temperature range | 4 |
| Low level output voltage | VOL | | 4 | 15 | mV | VCC=+5 V; RL = 10 kΩ, T=25 °C | 4 |
| Low level output voltage | VOL | | | 15 | mV | VCC=+5 V; RL = 10 kΩ, full temperature range | 4 |
| Output sink current | Isink | 74 | 104 | | mA | VCC=+5 V; Vout = VCC, Vid=-1 V, T=25 °C | 5 |
| Output sink current | Isink | 53 | | | mA | VCC=+5 V; Vout = VCC, Vid=-1 V, TS507I full temperature range | 5 |
| Output source current | Isource | 90 | 128 | | mA | VCC=+5 V; Vout = VDD, Vid=1 V, T=25 °C | 5 |
| Output source current | Isource | 70 | | | mA | VCC=+5 V; Vout = VDD, Vid=1 V, TS507I full temperature range | 5 |
| Supply current (per operator) | ICC | | 0.85 | 1.15 | mA | VCC=+5 V; No load, Vout=VCC/2, Vicm=0 to 5 V, T=25 °C | 5 |
| Supply current (per operator) | ICC | | | 1.25 | mA | VCC=+5 V; No load, Vout=VCC/2, Vicm=0 to 5 V, full temperature range | 5 |
| Input offset voltage | Vio | | | 400 | µV | VCC=+3.3 V; Vicm = 0 to 2.1 V, TS507I full temperature range | 6 |
| Input offset voltage | Vio | | | 750 | µV | VCC=+3.3 V; Vicm = 0 V to 3.3 V, TS507I full temperature range | 6 |
| Input bias current | Iib | | | 145 | nA | VCC=+3.3 V; TS507I full temperature range | 6 |
| Supply current (per operator) | ICC | | 0.81 | 1.1 | mA | VCC=+3.3 V; No load, Vout=VCC/2, Vicm=0 to 3.3 V, T=25 °C | 6 |
| Supply current (per operator) | ICC | | | 1.2 | mA | VCC=+3.3 V; No load, Vout=VCC/2, Vicm=0 to 3.3 V, full temperature range | 6 |
| High level output voltage drop | VCC-VOH | | | 110 | mV | VCC=+3.3 V; RL = 600 Ω, TS507I full temperature range | 6 |
| Low level output voltage | VOL | | | 115 | mV | VCC=+3.3 V; RL = 600 Ω, TS507I full temperature range | 6 |
| Output sink current | Isink | 22 | | | mA | VCC=+3.3 V; Vout = VCC, Vid=-1 V, TS507I full temperature range | 6 |
| Output source current | Isource | 29 | | | mA | VCC=+3.3 V; Vout = VDD, Vid=1 V, TS507I full temperature range | 6 |
| Input offset voltage | Vio | | | 400 | µV | VCC=+2.7 V; Vicm = 0 to 1.9 V, TS507I full temperature range | 8 |
| Input offset voltage | Vio | | | 750 | µV | VCC=+2.7 V; Vicm = 0 V to 2.7 V, TS507I full temperature range | 8 |
| Input bias current | Iib | | | 160 | nA | VCC=+2.7 V; TS507I full temperature range | 8 |
| Supply current (per operator) | ICC | | 0.79 | 1.1 | mA | VCC=+2.7 V; No load, Vout=VCC/2, Vicm=0 to 2.7 V, T=25 °C | 8 |
| Supply current (per operator) | ICC | | | 1.2 | mA | VCC=+2.7 V; No load, Vout=VCC/2, Vicm=0 to 2.7 V, full temperature range | 8 |
| High level output voltage drop | VCC-VOH | | | 105 | mV | VCC=+2.7 V; RL = 600 Ω, TS507I full temperature range | 8 |
| Low level output voltage | VOL | | | 115 | mV | VCC=+2.7 V; RL = 600 Ω, TS507I full temperature range | 8 |
| Output sink current | Isink | 13 | | | mA | VCC=+2.7 V; Vout = VCC, Vid=-1 V, TS507I full temperature range | 8 |
| Output source current | Isource | 17 | | | mA | VCC=+2.7 V; Vout = VDD, Vid=1 V, TS507I full temperature range | 8 |
| Thermal resistance junction to ambient (SOT23-5) | Rthja | | 250 | | °C/W | SOT23-5; Rthja/c are typical values | 3 |
| Thermal resistance junction to case (SOT23-5) | Rthjc | | 81 | | °C/W | SOT23-5; Rthja/c are typical values | 3 |
## CAD (KiCad official)
- Symbol: `TS507ILT`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `ts507ilt-etched.step` / `ts507ilt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ts507ilt.step` / `ts507ilt.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588902879776555008) (20 pp, sha256 `e953185acc092953`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ts507ilt-datasheet.pdf)