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Contents

README

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TS3L100PWR

Texas Instruments · Analog Switches - Special Purpose · TSSOP-16

TS3L100PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S input Select input that chooses whether each Y port connects to its IX0 (S low) or IX1 (S high) port; hold at VCC or GND, VIH 2 V min, VIL 0.8 V max.
2 IA0 bidirectional Channel A data I/O port 0, connected to YA when E is low and S is low.
3 IA1 bidirectional Channel A data I/O port 1, connected to YA when E is low and S is high.
4 YA bidirectional Channel A common data I/O, switched to IA0 or IA1 according to S; high-impedance when E is high.
5 IB0 bidirectional Channel B data I/O port 0, connected to YB when E is low and S is low.
6 IB1 bidirectional Channel B data I/O port 1, connected to YB when E is low and S is high.
7 YB bidirectional Channel B common data I/O, switched to IB0 or IB1 according to S; high-impedance when E is high.
8 GND power_in Ground.
9 YC bidirectional Channel C common data I/O, switched to IC0 or IC1 according to S; high-impedance when E is high.
10 IC1 bidirectional Channel C data I/O port 1, connected to YC when E is low and S is high.
11 IC0 bidirectional Channel C data I/O port 0, connected to YC when E is low and S is low.
12 YD bidirectional Channel D common data I/O, switched to ID0 or ID1 according to S; high-impedance when E is high.
13 ID1 bidirectional Channel D data I/O port 1, connected to YD when E is low and S is high.
14 ID0 bidirectional Channel D data I/O port 0, connected to YD when E is low and S is low.
15 E input Active-low switch-enable input that disconnects all I and Y ports when high; tie to VCC through a pullup resistor to ensure high impedance during power up or power down.
16 VCC power_in Supply voltage, 3 V to 3.6 V recommended operating range (absolute maximum 4.6 V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: TS3L100PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: ts3l100pwr-etched.step / ts3l100pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ts3l100pwr.step / ts3l100pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 eb4d526f4dfa1311, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF