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README

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TS3L100DR

Texas Instruments · Analog Switches, Multiplexers · SOIC-16

TS3L100DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S input Select input that controls the data path of the multiplexer/demultiplexer, with VIH of 2 V to VCC and VIL of 0 V to 0.8 V.
2 IA0 bidirectional Data I/O port of switch A, connected to YA when E is low and S is low, with rail-to-rail switching from 0 to VCC and an ON-state switch current limit of ±128 mA.
3 IA1 bidirectional Data I/O port of switch A, connected to YA when E is low and S is high, with rail-to-rail switching from 0 to VCC and an ON-state switch current limit of ±128 mA.
4 YA bidirectional Common data I/O port of switch A, which connects to IA0 or IA1 depending on S when E is low and is high-impedance when E is high.
5 IB0 bidirectional Data I/O port of switch B, connected to YB when E is low and S is low, with rail-to-rail switching from 0 to VCC and an ON-state switch current limit of ±128 mA.
6 IB1 bidirectional Data I/O port of switch B, connected to YB when E is low and S is high, with rail-to-rail switching from 0 to VCC and an ON-state switch current limit of ±128 mA.
7 YB bidirectional Common data I/O port of switch B, which connects to IB0 or IB1 depending on S when E is low and is high-impedance when E is high.
8 GND power_in Ground reference for the device; all voltages are referenced to ground and continuous current through the GND terminal is limited to ±100 mA.
9 YC bidirectional Common data I/O port of switch C, which connects to IC0 or IC1 depending on S when E is low and is high-impedance when E is high.
10 IC1 bidirectional Data I/O port of switch C, connected to YC when E is low and S is high, with rail-to-rail switching from 0 to VCC and an ON-state switch current limit of ±128 mA.
11 IC0 bidirectional Data I/O port of switch C, connected to YC when E is low and S is low, with rail-to-rail switching from 0 to VCC and an ON-state switch current limit of ±128 mA.
12 YD bidirectional Common data I/O port of switch D, which connects to ID0 or ID1 depending on S when E is low and is high-impedance when E is high.
13 ID1 bidirectional Data I/O port of switch D, connected to YD when E is low and S is high, with rail-to-rail switching from 0 to VCC and an ON-state switch current limit of ±128 mA.
14 ID0 bidirectional Data I/O port of switch D, connected to YD when E is low and S is low, with rail-to-rail switching from 0 to VCC and an ON-state switch current limit of ±128 mA.
15 E input Active-low switch enable input with VIH of 2 V to VCC and VIL of 0 V to 0.8 V; when high the I and Y ports are disconnected and should be tied to VCC through a pullup resistor during power up or down.
16 VCC power_in Supply voltage, with a recommended operating range of 3 V to 3.6 V and continuous current through the VCC terminal limited to ±100 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: TS3L100DR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: ts3l100dr-etched.step / ts3l100dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ts3l100dr.step / ts3l100dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 eb4d526f4dfa1311, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF