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TS3314VLX

Shenzhen JingYang · ESD And Surge Protection (TVS/ESD) · SOT-23-6L

TS3314VLX from Shenzhen JingYang, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I/O1 bidirectional Line I/O1 is an ESD/surge-protected data line with about 1.5 pF typical capacitance to GND at 0 V and 3.3 V working voltage, and it withstands ±30 kV air and contact ESD per IEC 61000-4-2.
2 GND power_in Ground reference for the protection clamps; the datasheet says to connect pin 2 to the system ground plane.
3 I/O2 bidirectional Line I/O2 is an ESD/surge-protected data line with about 1.5 pF typical capacitance to GND at 0 V and 3.3 V working voltage, and it withstands ±30 kV air and contact ESD per IEC 61000-4-2.
4 I/O4 bidirectional Line I/O4 is an ESD/surge-protected data line with about 1.5 pF typical capacitance to GND at 0 V and 3.3 V working voltage, and it withstands ±30 kV air and contact ESD per IEC 61000-4-2.
5 NC unconnected Not connected; the datasheet pin configuration lists this pin as NC with no internal connection.
6 I/O3 bidirectional Line I/O3 is an ESD/surge-protected data line with about 1.5 pF typical capacitance to GND at 0 V and 3.3 V working voltage, and it withstands ±30 kV air and contact ESD per IEC 61000-4-2.

Key specifications

Parameter Value
Manufacturer Shenzhen JingYang
Package SOT-23-6L
Category Circuit Protection
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Peak Pulse Current (8/20μs) IPP 12 A 8/20μs 2
Peak Pulse Power (8/20μs) PPK 180 Watts 8/20μs 2
ESD per IEC 61000-4-2 (Air) VESD -30 30 kV IEC 61000-4-2 (Air) 2
ESD per IEC 61000-4-2 (Contact) VESD -30 30 kV IEC 61000-4-2 (Contact) 2
Operating Temperature TOPT -55 125 C 2
Storage Temperature TSTG -55 150 C 2
Reverse Leakage Current @ VRWM IR 0.01 0.1 μA VRWM = 3.3V, T = 25C 2
Trigger Voltage Vt1 6 7.2 8 V It1 = 1μA 2
Holding Voltage Vh 4 5 V Ih = 10mA 2
Clamping Voltage @ IPP = 1A VC 8 V IPP = 1A, tp = 8/20μs (Each Line) 2
Clamping Voltage @ IPP = 5A VC 10 V IPP = 5A, tp = 8/20μs (Each Line) 2
Clamping Voltage @ IPP = 12A VC 15 V IPP = 12A, tp = 8/20μs (Each Line) 2
Parasitic Capacitance between I/O Pins and Ground CESD 1.5 2 pF Between I/O Pins and Ground, VR = 0V, f = 1MHz 2
Parasitic Capacitance between I/O Pins CESD 0.8 1 pF Between I/O Pins, VR = 0V, f = 1MHz 2

CAD (KiCad official)

  • Symbol: TS3314VLX
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6L (KiCad packages3D, STEP)
  • 3D model files: ts3314vlx-etched.step / ts3314vlx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ts3314vlx.step / ts3314vlx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shenzhen JingYang datasheet (7 pp, sha256 773d4f7dd0584018, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF