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TS2524PSX

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Shenzhen JingYang ESD And Surge Protection (TVS/ESD), DFN-10L(3x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 4h ago
viewers ts2524psx: viewers · Ray 4h ago
package.json Publish 0.1.0 · Ray 4h ago
page.json Set visibility: public · Ray 4h ago
README.md Publish 0.1.0 · Ray 4h ago
ts2524psx-etched.glb ts2524psx: factory component page (tier=lcsc) · Ray 4h ago
ts2524psx-etched.step ts2524psx: factory component page (tier=lcsc) · Ray 4h ago
ts2524psx-hero.glb ts2524psx: hero GLB from the etched model (keeps the MPN mark) · Ray 4h ago
ts2524psx-hero.overlay.json Publish 0.1.0 · Ray 4h ago
ts2524psx.glb Publish 0.1.0 · Ray 4h ago
ts2524psx.kicad_mod Publish 0.1.0 · Ray 4h ago
ts2524psx.kicad_sym Publish 0.1.0 · Ray 4h ago
ts2524psx.lbr Publish 0.1.0 · Ray 4h ago
ts2524psx.step Publish 0.1.0 · Ray 4h ago

TS2524PSX

Shenzhen JingYang · ESD And Surge Protection (TVS/ESD) · DFN-10L(3x2)

TS2524PSX from Shenzhen JingYang, in a DFN-10L(3x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LINE1_IN passive Line 1 protected I/O input, flow-through to LINE1_OUT, ±30kV IEC 61000-4-2 ESD, 3.8pF typical capacitance to ground at 0V.
2 LINE2_IN passive Line 2 protected I/O input, flow-through to LINE2_OUT, ±30kV IEC 61000-4-2 ESD, 2.5V working voltage.
3 GND power_in Ground, must be connected to the system ground plane together with pin 8 and all GND tabs.
4 LINE3_IN passive Line 3 protected I/O input, flow-through to LINE3_OUT, 40A (8/20μs) surge rated.
5 LINE4_IN passive Line 4 protected I/O input, flow-through to LINE4_OUT, 40A (8/20μs) surge rated.
6 LINE4_OUT passive Line 4 protected I/O output, flow-through side paired with LINE4_IN.
7 LINE3_OUT passive Line 3 protected I/O output, flow-through side paired with LINE3_IN.
8 GND power_in Ground, must be connected to the system ground plane together with pin 3 and all GND tabs.
9 LINE2_OUT passive Line 2 protected I/O output, flow-through side paired with LINE2_IN.
10 LINE1_OUT passive Line 1 protected I/O output, flow-through side paired with LINE1_IN.
11 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Shenzhen JingYang
Package DFN-10L(3x2)
Category Circuit Protection
Pins 11

CAD (KiCad official)

  • Symbol: TS2524PSX
  • Footprint: Package_DFN_QFN:DFN-10-1EP_2x3mm_P0.5mm_EP0.64x2.4mm
  • 3D model: DFN-10L(3x2) (KiCad packages3D, STEP)
  • 3D model files: ts2524psx-etched.step / ts2524psx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ts2524psx.step / ts2524psx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shenzhen JingYang datasheet (8 pp, sha256 62f2771ed73cbf3c, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF