# TS1871ILT

**STMicroelectronics** · Operational Amplifier · SOT-23-5

TS1871ILT from STMicroelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Out | output | Rail-to-rail amplifier output, swinging within 100 mV of each rail with a 600 Ω load and typically sourcing 65 mA. |
| 2 | VCC- | power_in | Negative supply (ground) terminal; supply range VCC is 1.8 to 6 V between VCC+ and VCC-. |
| 3 | In+ | input | Non-inverting input, with common-mode range extending 0.2 V beyond each supply at 25 °C and absolute maximum input voltage of VCC- -0.3 V to VCC+ +0.3 V. |
| 4 | In- | input | Inverting input, with common-mode range extending 0.2 V beyond each supply at 25 °C and differential input voltage limited to ±1 V. |
| 5 | VCC+ | power_in | Positive supply terminal; operating range 1.8 to 6 V and absolute maximum supply voltage 7 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOT-23-5 |
| Category | Amplifiers/Comparators |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | Vio |  |  | 3 | mV | VCC=1.8 V; Vicm=Vout=VCC/2; TS1871 (non-A) at Tamb=25 °C | 5 |
| Input offset voltage | Vio |  |  | 6 | mV | VCC=1.8 V; Vicm=Vout=VCC/2; Tmin≤Tamb≤Tmax, TS1871 (non-A) | 5 |
| Input offset current | Iio |  | 3 | 30 | nA | VCC=1.8 V; Vicm=Vout=VCC/2; Tamb=25 °C | 5 |
| Input offset current | Iio |  |  | 60 | nA | VCC=1.8 V; Vicm=Vout=VCC/2; Tmin≤Tamb≤Tmax | 5 |
| Input bias current | Iib |  | 40 | 125 | nA | VCC=1.8 V; Vicm=Vout=VCC/2; Tamb=25 °C | 5 |
| Input bias current | Iib |  |  | 150 | nA | VCC=1.8 V; Vicm=Vout=VCC/2; Tmin≤Tamb≤Tmax | 5 |
| Common mode rejection ratio | CMR | 55 | 77 |  | dB | VCC=1.8 V; 20 log (ΔVic/ΔVio); 0≤Vicm≤VCC, Vout=VCC/2; Tamb=25 °C | 5 |
| Common mode rejection ratio | CMR | 52 |  |  | dB | VCC=1.8 V; 20 log (ΔVic/ΔVio); 0≤Vicm≤VCC, Vout=VCC/2; Tmin≤Tamb≤Tmax | 5 |
| Large signal voltage gain | Avd | 77 | 91 |  | dB | VCC=1.8 V; Vout=0.5 to 1.3 V; RL=2 kΩ | 5 |
| Large signal voltage gain | Avd | 70 | 84 |  | dB | VCC=1.8 V; Vout=0.5 to 1.3 V; RL=600 Ω | 5 |
| High level output voltage | VOH | 1.65 | 1.77 |  | V | VCC=1.8 V; Vid=100 mV; RL=2 kΩ; Tamb=25 °C | 5 |
| High level output voltage | VOH | 1.62 | 1.74 |  | V | VCC=1.8 V; Vid=100 mV; RL=600 Ω; Tamb=25 °C | 5 |
| High level output voltage | VOH | 1.65 |  |  | V | VCC=1.8 V; Vid=100 mV; Tmin≤Tamb≤Tmax, RL=2 kΩ | 5 |
| High level output voltage | VOH | 1.62 |  |  | V | VCC=1.8 V; Vid=100 mV; Tmin≤Tamb≤Tmax, RL=600 Ω | 5 |
| Low level output voltage | VOL |  | 30 | 100 | mV | VCC=1.8 V; Vid=-100 mV; RL=2 kΩ; Tamb=25 °C | 5 |
| Low level output voltage | VOL |  | 46 | 150 | mV | VCC=1.8 V; Vid=-100 mV; RL=600 Ω; Tamb=25 °C | 5 |
| Low level output voltage | VOL |  |  | 100 | mV | VCC=1.8 V; Vid=-100 mV; Tmin≤Tamb≤Tmax, RL=2 kΩ | 5 |
| Low level output voltage | VOL |  |  | 150 | mV | VCC=1.8 V; Vid=-100 mV; Tmin≤Tamb≤Tmax, RL=600 Ω | 5 |
| Output source current | Io | 20 | 58 |  | mA | VCC=1.8 V; Vid=100 mV, VO=VCC- | 5 |
| Output sink current | Io | 20 | 68 |  | mA | VCC=1.8 V; Vid=-100 mV, VO=VCC+ | 5 |
| Supply current (per amplifier) | ICC |  | 400 | 560 | µA | VCC=1.8 V; Vout=VCC/2; AVCL=1, no load; Tamb=25 °C | 5 |
| Supply current (per amplifier) | ICC |  |  | 600 | µA | VCC=1.8 V; Vout=VCC/2; AVCL=1, no load; Tmin≤Tamb≤Tmax | 5 |
| Gain bandwidth product | GBP | 0.9 | 1.6 |  | MHz | VCC=1.8 V; RL=10 kΩ, CL=100 pF, f=100 kHz | 5 |
| Slew rate | SR | 0.38 | 0.54 |  | V/µs | VCC=1.8 V; RL=10 kΩ, CL=100 pF, AV=1 | 5 |
| Supply voltage | VCC |  |  | 7 | V |  | 3 |
| Differential input voltage | Vid | -1 |  | 1 | V | Differential voltage; if Vid > ±1 V, maximum input current ±1 mA | 3 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 3 |
| Maximum junction temperature | Tj |  |  | 150 | °C |  | 3 |
| Lead temperature (soldering) |  |  |  | 250 | °C | soldering, 10 sec | 3 |
| Supply voltage | VCC | 1.8 |  | 6 | V |  | 4 |
| Operating free air temperature range | Toper | -40 |  | 125 | °C |  | 4 |
| Thermal resistance junction-to-ambient | Rthja |  | 250 |  | °C/W | SOT23-5 package | 3 |
| Thermal resistance junction-to-case | Rthjc |  | 81 |  | °C/W | SOT23-5 package | 3 |

## CAD (KiCad official)

- Symbol: `TS1871ILT`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `ts1871ilt-etched.step` / `ts1871ilt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ts1871ilt.step` / `ts1871ilt.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588954996943151104) (25 pp, sha256 `2d137531056c6560`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ts1871ilt-datasheet.pdf)