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TS1852IDT

STMicroelectronics · Operational Amplifier · SO-8

TS1852IDT from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Out1 output Amplifier 1 rail-to-rail output, able to drive 500 pF and with a maximum output current of approximately 48 mA.
2 In1- input Amplifier 1 inverting input, rail-to-rail with common-mode range of VCC- - 0.2 V to VCC+ + 0.2 V.
3 In1+ input Amplifier 1 non-inverting input, rail-to-rail with common-mode range of VCC- - 0.2 V to VCC+ + 0.2 V.
4 VCC- power_in Negative supply voltage (ground in single-supply use); total supply 1.8 to 6 V, absolute maximum 7 V.
5 In2+ input Amplifier 2 non-inverting input, rail-to-rail with common-mode range of VCC- - 0.2 V to VCC+ + 0.2 V.
6 In2- input Amplifier 2 inverting input, rail-to-rail with common-mode range of VCC- - 0.2 V to VCC+ + 0.2 V.
7 Out2 output Amplifier 2 rail-to-rail output, able to drive 500 pF and with a maximum output current of approximately 48 mA.
8 VCC+ power_in Positive supply voltage; operating range 1.8 to 6 V with respect to VCC-, absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 7 V 3
Differential input voltage Vid -1 1 V 3
Input voltage Vi -0.3 0.3 V VCC- -0.3 to VCC+ +0.3 (offsets relative to rails) 3
Storage temperature Tstg -65 150 °C 3
Maximum junction temperature Tj 150 °C 3
Thermal resistance junction to ambient Rthja 125 °C/W SO-8 3
Thermal resistance junction to case Rthjc 40 °C/W SO-8 3
ESD HBM ESD 2 kV human body model 3
ESD MM ESD 200 V machine model 3
ESD CDM ESD 1.5 kV charged device model 3
Lead temperature 250 °C soldering, 10 sec 3
Supply voltage VCC 1.8 6 V 4
Operating free-air temperature range Toper -40 125 °C 4
Input offset voltage Vio 0.1 3 mV VCC=1.8V, TS1852, Tamb=25°C 5
Input offset voltage over temperature Vio 6 mV VCC=1.8V, TS1852, Tmin ≤ Tamb ≤ Tmax 5
Input offset current Iio 19 nA VCC=1.8V, Vicm = Vout = VCC/2 5
Input bias current Iib 10 50 nA VCC=1.8V, Vicm = Vout = VCC/2 5
Common mode rejection ratio CMR 55 85 dB VCC=1.8V, 0 ≤ Vicm ≤ VCC 5
Large signal voltage gain RL=10k Avd 80 100 dB VCC=1.8V, Vout = 0.5 to 1.3 V, RL = 10 kΩ 5
Large signal voltage gain RL=2k Avd 70 100 dB VCC=1.8V, Vout = 0.5 to 1.3 V, RL = 2 kΩ 5
High level output voltage RL=10k VOH 1.7 V VCC=1.8V, Vid = 100 mV, RL = 10 kΩ 5
High level output voltage RL=2k VOH 1.65 V VCC=1.8V, Vid = 100 mV, RL = 2 kΩ 5
Low level output voltage RL=10k VOL 40 70 mV VCC=1.8V, Vid = -100 mV, RL = 10 kΩ 5
Low level output voltage RL=2k VOL 62 90 mV VCC=1.8V, Vid = -100 mV, RL = 2 kΩ 5
Supply current per amplifier ICC 120 170 μA VCC=1.8V, Vout = VCC/2, AVCL = 1, no load 5
Gain bandwidth product GBP 300 530 kHz VCC=1.8V, RL = 10 kΩ, CL = 100 pF, f = 100 kHz 5
Slew rate SR 0.1 0.18 V/μs VCC=1.8V, RL = 10 kΩ, CL = 100 pF, AV = 1 5
Input offset voltage Vio 0.1 3 mV VCC=3V, TS1852, Vicm = Vout = VCC/2, Tamb=25°C 6
Input offset voltage over temperature Vio 6 mV VCC=3V, TS1852, Tmin ≤ Tamb ≤ Tmax 6
Input offset current Iio 19 nA VCC=3V, Vicm = Vout = VCC/2 6
Input bias current Iib 10 55 nA VCC=3V, Vicm = Vout = VCC/2 6
Common mode rejection ratio CMR 60 90 dB VCC=3V, 0 ≤ Vicm ≤ VCC 6
Large signal voltage gain RL=10k Avd 83 102 dB VCC=3V, Vout = 0.5 to 2.5 V, RL = 10 kΩ 6
Large signal voltage gain RL=2k Avd 74 102 dB VCC=3V, Vout = 0.5 to 2.5 V, RL = 2 kΩ 6
High level output voltage RL=10k VOH 2.9 V VCC=3V, Vid = 100 mV, RL = 10 kΩ 6
High level output voltage RL=2k VOH 2.85 V VCC=3V, Vid = 100 mV, RL = 2 kΩ 6
Low level output voltage RL=10k VOL 10 90 mV VCC=3V, Vid = -100 mV, RL = 10 kΩ 6
Low level output voltage RL=2k VOL 46 100 mV VCC=3V, Vid = -100 mV, RL = 2 kΩ 6
Supply current per amplifier ICC 150 200 μA VCC=3V, Vout = VCC/2, AVCL = 1, no load 6
Gain bandwidth product GBP 370 600 kHz VCC=3V, RL = 10 kΩ, CL = 100 pF, f = 100 kHz 6
Slew rate SR 0.12 0.2 V/μs VCC=3V, RL = 10 kΩ, CL = 100 pF, AV = 1 6
Input offset voltage Vio 0.1 3 mV VCC=5V, TS1852, Vicm = Vout = VCC/2, Tamb=25°C 7
Input offset voltage over temperature Vio 6 mV VCC=5V, TS1852, Tmin ≤ Tamb ≤ Tmax 7
Input offset current Iio 19 nA VCC=5V, Vicm = Vout = VCC/2 7
Input bias current Iib 16 63 nA VCC=5V, Vicm = Vout = VCC/2 7
Common mode rejection ratio CMR 65 95 dB VCC=5V, 0 ≤ Vicm ≤ VCC 7
Supply voltage rejection ratio SVR 70 90 dB VCC = 1.8 to 5 V 7
Large signal voltage gain RL=10k Avd 85 104 dB VCC=5V, Vout = 0.5 to 4 V, RL = 10 kΩ 7
Large signal voltage gain RL=2k Avd 77 104 dB VCC=5V, Vout = 0.5 to 4 V, RL = 2 kΩ 7
High level output voltage RL=10k VOH 4.85 V VCC=5V, Vid = 100 mV, RL = 10 kΩ 7
High level output voltage RL=2k VOH 4.8 V VCC=5V, Vid = 100 mV, RL = 2 kΩ 7
Low level output voltage RL=10k VOL 40 180 mV VCC=5V, Vid = -100 mV, RL = 10 kΩ 7
Low level output voltage RL=2k VOL 80 200 mV VCC=5V, Vid = -100 mV, RL = 2 kΩ 7
Supply current per amplifier ICC 162 220 μA VCC=5V, Vout = VCC/2, AVCL = 1, no load 7
Gain bandwidth product GBP 380 656 kHz VCC=5V, RL = 10 kΩ, CL = 100 pF, f = 100 kHz 7
Slew rate SR 0.13 0.25 V/μs VCC=5V, RL = 10 kΩ, CL = 100 pF, AV = 1 7

CAD (KiCad official)

  • Symbol: TS1852IDT
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: ts1852idt-etched.step / ts1852idt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ts1852idt.step / ts1852idt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (24 pp, sha256 581493ad3b8af97a, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF