component
TS12A44514DR
Public Made by Adomby adom
Texas Instruments Analog Switches, Multiplexers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 3h ago |
| viewers | 3h ago |
| package.json | 3h ago |
| page.json | 3h ago |
| README.md | 3h ago |
| ts12a44514dr-etched.glb | 3h ago |
| ts12a44514dr-etched.step | 3h ago |
| ts12a44514dr-hero.glb | 3h ago |
| ts12a44514dr-hero.overlay.json | 3h ago |
| ts12a44514dr.glb | 3h ago |
| ts12a44514dr.kicad_mod | 3h ago |
| ts12a44514dr.kicad_sym | 3h ago |
| ts12a44514dr.lbr | 3h ago |
| ts12a44514dr.step | 3h ago |
TS12A44514DR
Texas Instruments · Analog Switches, Multiplexers · SOIC-14
TS12A44514DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NO1 | bidirectional | Normally open switch terminal 1, connected to COM1 when IN1 is high (function table: L = OFF, H = ON). |
| 2 | COM1 | bidirectional | Common analog I/O terminal for switch 1, operating across the analog signal range of 0 V to VCC. |
| 3 | NO2 | bidirectional | Normally open switch terminal 2, connected to COM2 when IN2 is high (function table: L = OFF, H = ON). |
| 4 | COM2 | bidirectional | Common analog I/O terminal for switch 2, operating across the analog signal range of 0 V to VCC. |
| 5 | IN2 | input | Digital control input for switch 2; logic thresholds are 0.8 V (low) and 2.4 V (high) with a 5-V supply. |
| 6 | IN3 | input | Digital control input for switch 3; logic thresholds are 0.8 V (low) and 2.4 V (high) with a 5-V supply. |
| 7 | GND | power_in | Ground reference; VCC and GND set the analog voltage limits of the internal switches. |
| 8 | NO3 | bidirectional | Normally open switch terminal 3, connected to COM3 when IN3 is high (function table: L = OFF, H = ON). |
| 9 | COM3 | bidirectional | Common analog I/O terminal for switch 3, operating across the analog signal range of 0 V to VCC. |
| 10 | COM4 | bidirectional | Common analog I/O terminal for switch 4, operating across the analog signal range of 0 V to VCC. |
| 11 | NO4 | bidirectional | Normally open switch terminal 4, connected to COM4 when IN4 is high (function table: L = OFF, H = ON). |
| 12 | IN4 | input | Digital control input for switch 4; logic thresholds are 0.8 V (low) and 2.4 V (high) with a 5-V supply. |
| 13 | IN1 | input | Digital control input for switch 1; logic thresholds are 0.8 V (low) and 2.4 V (high) with a 5-V supply. |
| 14 | VCC | power_in | Positive supply, specified from 2 V to 12 V with an absolute maximum of 13 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Interface |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.3 | 13 | V | 4 | ||
| Analog voltage | VNC, VNO, VCOM | -0.3 | V | Upper limit printed as VCC + 0.3 V | 4 | ||
| Analog current | INC, INO, ICOM | -20 | 20 | mA | 4 | ||
| Peak current | -30 | 30 | mA | Pulsed at 1 ms, 10% duty cycle | 4 | ||
| Operating temperature | TA | -40 | 85 | °C | 4 | ||
| Power dissipation | PD | 0.88 | W | PW package; JEDEC 4-layer board (JESD 51-7), no airflow, TA = 25°C, TJ = 125°C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Electrostatic discharge, human-body model | V(ESD) | -2000 | 2000 | V | HBM, ANSI/ESDA/JEDEC JS-001 | 4 | |
| Electrostatic discharge, charged-device model | V(ESD) | -500 | 500 | V | CDM, JEDEC JESD22-C101 | 4 | |
| Supply voltage | VCC | 2 | 12 | V | Over operating free-air temperature range | 4 | |
| Analog and digital input voltage range | VNC, VNO, VCOM, VIN | 0 | V | Upper limit printed as VCC | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 89.8 | °C/W | D package, 14 pins | 4 | ||
| ON-state resistance | Ron | 12 | 20 | Ω | VCC = 4.5 V to 5.5 V; VCC = 4.5 V, VCOM = 3.5 V, ICOM = 1 mA, TA = 25°C | 5 | |
| ON-state resistance, full temperature | Ron | 30 | Ω | VCC = 4.5 V to 5.5 V; VCC = 4.5 V, VCOM = 3.5 V, ICOM = 1 mA, Full temperature range | 5 | ||
| ON-state resistance flatness | Ron(flat) | 1 | 3 | Ω | VCC = 4.5 V to 5.5 V; VCOM = 1 V, 2 V, 3 V, ICOM = 1 mA, TA = 25°C | 5 | |
| ON-state resistance flatness, full temperature | Ron(flat) | 4 | Ω | VCC = 4.5 V to 5.5 V; VCOM = 1 V, 2 V, 3 V, ICOM = 1 mA, Full temperature range | 5 | ||
| ON-state resistance matching between channels | ΔRon | 3 | Ω | VCC = 4.5 V to 5.5 V; VCC = 4.5 V, ICOM = 5 mA, VNO or VNC = 3 V, TA = 25°C | 5 | ||
| ON-state resistance matching between channels, TMIN to TMAX | ΔRon | 4 | Ω | VCC = 4.5 V to 5.5 V; VCC = 4.5 V, ICOM = 5 mA, VNO or VNC = 3 V, TMIN to TMAX | 5 | ||
| NO, NC OFF leakage current | INO(OFF), INC(OFF) | 1 | nA | VCC = 4.5 V to 5.5 V; VCC = 5.5 V, VCOM = 1 V, VNO or VNC = 4.5 V, TA = 25°C | 5 | ||
| NO, NC OFF leakage current, full temperature | INO(OFF), INC(OFF) | 10 | nA | VCC = 4.5 V to 5.5 V; VCC = 5.5 V, VCOM = 1 V, VNO or VNC = 4.5 V, Full temperature range | 5 | ||
| Input logic high | VIH | 2.4 | V | Full temperature range; upper limit printed as VCC | 5 | ||
| Input logic low | VIL | 0 | 0.8 | V | Full temperature range | 5 | |
| Turn-on time | tON | 45 | 100 | ns | See Figure 2, TA = 25°C | 5 | |
| Turn-on time, full temperature | tON | 125 | ns | See Figure 2, Full temperature range | 5 | ||
| Turn-off time | tOFF | 35 | 50 | ns | See Figure 2, TA = 25°C | 5 | |
| Turn-off time, full temperature | tOFF | 70 | ns | See Figure 2, Full temperature range | 5 | ||
| Supply current, full temperature | ICC | 0.1 | μA | VIN = VCC, 0 V, Full temperature range | 5 | ||
| ON-state resistance | Ron | 6.5 | 10 | Ω | VCC = 11.4 V to 12.6 V; VCC = 11.4 V, VCOM = 10 V, ICOM = 1 mA, TA = 25°C | 6 | |
| ON-state resistance, full temperature | Ron | 15 | Ω | VCC = 11.4 V to 12.6 V; VCC = 11.4 V, VCOM = 10 V, ICOM = 1 mA, Full temperature range | 6 | ||
| ON-state resistance flatness | Ron(flat) | 1.5 | 3 | Ω | VCC = 11.4 V to 12.6 V; VCC = 11.4 V, VCOM = 2 V, 5 V, 10 V, ICOM = 1 mA, TA = 25°C | 6 | |
| ON-state resistance flatness, full temperature | Ron(flat) | 4 | Ω | VCC = 11.4 V to 12.6 V; VCC = 11.4 V, VCOM = 2 V, 5 V, 10 V, ICOM = 1 mA, Full temperature range | 6 | ||
| ON-state resistance matching between channels | ΔRon | 2.5 | Ω | VCC = 11.4 V to 12.6 V; VCC = 11.4 V, ICOM = 5 mA, VNO or VNC = 10 V, TA = 25°C | 6 | ||
| ON-state resistance matching between channels, TMIN to TMAX | ΔRon | 3 | Ω | VCC = 11.4 V to 12.6 V; VCC = 11.4 V, ICOM = 5 mA, VNO or VNC = 10 V, TMIN to TMAX | 6 | ||
| NO, NC OFF leakage current | INO(OFF), INC(OFF) | 1 | nA | VCC = 11.4 V to 12.6 V; VCC = 12.6 V, VCOM = 1 V, VNO or VNC = 10 V, TA = 25°C | 6 | ||
| NO, NC OFF leakage current, full temperature | INO(OFF), INC(OFF) | 10 | nA | VCC = 11.4 V to 12.6 V; VCC = 12.6 V, VCOM = 1 V, VNO or VNC = 10 V, Full temperature range | 6 | ||
| Input logic high | VIH | 5 | V | Full temperature range; upper limit printed as VCC | 6 | ||
| Input logic low | VIL | 0 | 0.8 | V | Full temperature range | 6 | |
| Turn-on time | tON | 25 | 75 | ns | See Figure 2, TA = 25°C | 6 | |
| Turn-on time, full temperature | tON | 80 | ns | See Figure 2, Full temperature range | 6 | ||
| Turn-off time | tOFF | 20 | 45 | ns | See Figure 2, TA = 25°C | 6 | |
| Turn-off time, full temperature | tOFF | 50 | ns | See Figure 2, Full temperature range | 6 | ||
| Supply current, full temperature | ICC | 0.2 | μA | VIN = VCC, 0 V, Full temperature range | 6 | ||
| ON-state resistance | Ron | 20 | 40 | Ω | VCC = 3 V to 3.6 V; VCC = 3 V, VCOM = 1.5 V, INO = 1 mA, TA = 25°C | 7 | |
| ON-state resistance, full temperature | Ron | 50 | Ω | VCC = 3 V to 3.6 V; VCC = 3 V, VCOM = 1.5 V, INO = 1 mA, Full temperature range | 7 | ||
| ON-state resistance flatness | Ron(flat) | 1 | 3 | Ω | VCC = 3 V to 3.6 V; VCC = 3 V, VCOM = 1 V, 1.5 V, 2 V, ICOM = 1 mA, TA = 25°C | 7 | |
| ON-state resistance flatness, full temperature | Ron(flat) | 4 | Ω | VCC = 3 V to 3.6 V; VCC = 3 V, VCOM = 1 V, 1.5 V, 2 V, ICOM = 1 mA, Full temperature range | 7 | ||
| ON-state resistance matching between channels | ΔRon | 3.5 | Ω | VCC = 2.7 V, ICOM = 5 mA, VNO or VNC = 1.5 V, TA = 25°C | 7 | ||
| ON-state resistance matching between channels, TMIN to TMAX | ΔRon | 4.5 | Ω | VCC = 2.7 V, ICOM = 5 mA, VNO or VNC = 1.5 V, TMIN to TMAX | 7 | ||
| NO, NC OFF leakage current | INO(OFF), INC(OFF) | 1 | nA | VCC = 3 V to 3.6 V; VCC = 3.6 V, VCOM = 1 V, VNO or VNC = 3 V, TA = 25°C | 7 | ||
| NO, NC OFF leakage current, full temperature | INO(OFF), INC(OFF) | 10 | nA | VCC = 3 V to 3.6 V; VCC = 3.6 V, VCOM = 1 V, VNO or VNC = 3 V, Full temperature range | 7 | ||
| Input logic high | VIH | 2.4 | V | Full temperature range; upper limit printed as VCC | 7 | ||
| Input logic low | VIL | 0 | 0.8 | V | Full temperature range | 7 | |
| Turn-on time | tON | 70 | 120 | ns | See Figure 2, TA = 25°C | 7 | |
| Turn-on time, full temperature | tON | 175 | ns | See Figure 2, Full temperature range | 7 | ||
| Turn-off time | tOFF | 50 | 80 | ns | See Figure 2, TA = 25°C | 7 | |
| Turn-off time, full temperature | tOFF | 120 | ns | See Figure 2, Full temperature range | 7 | ||
| Supply current, full temperature | ICC | 0.2 | μA | VIN = VCC, 0 V, Full temperature range | 7 |
CAD (KiCad official)
- Symbol:
TS12A44514DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
ts12a44514dr-etched.step/ts12a44514dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ts12a44514dr.step/ts12a44514dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
4e81994cf082ca6c, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).