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TRS3232EIDR

Public Made by Adom

by adom

Texas Instruments RS232 ICs, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs trs3232eidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers trs3232eidr: viewers · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 10d ago
README.md trs3232eidr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 14d ago
trs3232eidr-etched.fit.json trs3232eidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
trs3232eidr-etched.glb trs3232eidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
trs3232eidr-etched.step trs3232eidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
trs3232eidr.glb Publish 0.1.0 · Ray 1mo ago
trs3232eidr.kicad_mod Publish 0.1.0 · Ray 1mo ago
trs3232eidr.kicad_sym Publish 0.1.0 · Ray 1mo ago
trs3232eidr.lbr Publish 0.1.0 · Ray 1mo ago
trs3232eidr.step Publish 0.1.0 · Ray 1mo ago

TRS3232EIDR

Texas Instruments · RS232 ICs · SOIC-16

TRS3232EIDR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 C1+ passive Positive lead of the C1 charge-pump flying capacitor. Connect an external 0.1 µF (VCC=3.3V) or 0.047 µF (VCC=5V) capacitor between C1+ and C1-.
2 V+ power_out Positive charge-pump output (~+5.4 V typical) for the storage capacitor only. Connect a 0.1 µF (or 0.33 µF at 5V) capacitor from V+ to GND.
3 C1- passive Negative lead of the C1 charge-pump flying capacitor. Paired with C1+.
4 C2+ passive Positive lead of the C2 charge-pump flying capacitor. Connect an external 0.1 µF (0.33 µF at 5V) capacitor between C2+ and C2-.
5 C2- passive Negative lead of the C2 charge-pump flying capacitor. Paired with C2+.
6 V- power_out Negative charge-pump output (~-5.4 V typical) for the storage capacitor only. Connect a 0.1 µF (or 0.33 µF at 5V) capacitor from V- to GND.
7 DOUT2 output RS-232 line driver output (channel 2) to the remote RS-232 system. Swings to approximately ±5 V with 3 kΩ load; output resistance 300 Ω min. ±15 kV IEC ESD protected.
8 RIN2 input RS-232 line receiver input (channel 2) from the remote RS-232 system. Accepts ±25 V input; input resistance 3-7 kΩ. ±15 kV IEC ESD protected.
9 ROUT2 output Logic-level receiver output (channel 2) to the UART/host. Rail-to-rail CMOS output referenced to VCC.
10 DIN2 input Logic-level driver input (channel 2) from the UART/host. Accepts 3.3 V or 5 V CMOS logic; VIH ≥ 2 V (3.3 V VCC).
11 DIN1 input Logic-level driver input (channel 1) from the UART/host. Accepts 3.3 V or 5 V CMOS logic; VIH ≥ 2 V (3.3 V VCC).
12 ROUT1 output Logic-level receiver output (channel 1) to the UART/host. Rail-to-rail CMOS output referenced to VCC.
13 RIN1 input RS-232 line receiver input (channel 1) from the remote RS-232 system. Accepts ±25 V input; input resistance 3-7 kΩ. ±15 kV IEC ESD protected.
14 DOUT1 output RS-232 line driver output (channel 1) to the remote RS-232 system. Swings to approximately ±5 V with 3 kΩ load; output resistance 300 Ω min. ±15 kV IEC ESD protected.
15 GND power_in Device ground reference. All supply voltages are referenced to this pin.
16 VCC power_in Primary supply voltage. Connect to an external 3.0 V to 5.5 V rail; typical ICC = 300 µA. Bypass with a ≥1 µF capacitor to GND to meet IEC 61000-4-2 rating.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Interface
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • TRS3232EIDR
  • TRS3232EIDRCDR
  • TRS3232EIDRCD
  • TRS3232EIDRIDBR
  • TRS3232EIDRIDB
  • TRS3232EIDRCDBR
  • TRS3232EIDRCDB
  • TRS3232EIDRIDWR
  • TRS3232EIDRIDW
  • TRS3232EIDRCDWR
  • TRS3232EIDRCDW
  • TRS3232EIDRIPWR
  • TRS3232EIDRIPW
  • TRS3232EIDRCPWR
  • TRS3232EIDRCPW
  • TRS3232EIDRIRGTR
  • TRS3232EIDRIRGT
  • TRS3232EIDRCRGTR
  • TRS3232EIDRCRGT
  • TRS3232EIDRIDYYR
  • TRS3232EIDRIDYY
  • TRS3232EIDRCDYYR
  • TRS3232EIDRCDYY

CAD (KiCad official)

  • Symbol: TRS3232EIDR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: trs3232eidr-etched.step / trs3232eidr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); trs3232eidr.step / trs3232eidr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
trs3232eidr.step 217 KB You want the bare part, or you mark your own boards.
trs3232eidr-etched.step 2.9 MB You want the part with TRS3232EIDR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 711 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (40 pp, sha256 3f3cd7b48e8281ed, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF