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Initial commit: component/trf7962arhbr

Ray ·80767209fd ·1d ago
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README.mdadded+70
@@ -0,0 +1,70 @@+# TRF7962ARHBR++**Texas Instruments** · RFID ICs · HVQFN-32-EP(5x5)++TRF7962ARHBR from Texas Instruments, in a HVQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD_A | power_out | Internally regulated supply output of 2.7 V to 3.4 V for the analog circuitry. |+| 2 | VIN | power_in | External supply input to the chip, 2.7 V to 5.5 V. |+| 3 | VDD_RF | power_out | Internally regulated supply output of 2.7 V to 5 V, normally connected to VDD_PA (pin 4). |+| 4 | VDD_PA | power_in | Supply input for the power amplifier, normally connected externally to VDD_RF (pin 3). |+| 5 | TX_OUT | output | RF output with selectable output power of 100 mW or 200 mW when VDD = 5 V. |+| 6 | VSS_PA | power_in | Negative supply for the power amplifier, normally connected to circuit ground. |+| 7 | VSS_RX | power_in | Negative supply for the receive inputs, normally connected to circuit ground. |+| 8 | RX_IN1 | input | Main receive input. |+| 9 | RX_IN2 | input | Auxiliary receive input. |+| 10 | VSS | power_in | Chip substrate ground. |+| 11 | BAND_GAP | output | Internal analog voltage reference output, bandgap voltage VBG = 1.6 V. |+| 12 | ASK/OOK | bidirectional | Selects ASK (0) or OOK (1) modulation for direct modes 0 and 1; can also be configured as an output providing the received analog signal. |+| 13 | IRQ | output | Interrupt request output to the MCU. |+| 14 | MOD | bidirectional | External data modulation input for direct mode 0 or 1, and subcarrier digital data output (see registers 0x1A and 0x1B). |+| 15 | VSS_A | power_in | Negative supply for the internal analog circuits, connected to GND. |+| 16 | VDD_I/O | power_in | Supply for the I/O communication level shifter, 1.8 V up to VIN; VIN must never be exceeded. |+| 17 | I/O_0 | bidirectional | I/O pin for parallel communication; hard-wired (with I/O_1 and I/O_2) to select the SPI mode when SPI is used. |+| 18 | I/O_1 | bidirectional | I/O pin for parallel communication; hard-wired (with I/O_0 and I/O_2) to select the SPI mode when SPI is used. |+| 19 | I/O_2 | bidirectional | I/O pin for parallel communication; hard-wired (with I/O_0 and I/O_1) to select the SPI mode when SPI is used. |+| 20 | I/O_3 | bidirectional | I/O pin for parallel communication. |+| 21 | I/O_4 | bidirectional | I/O pin for parallel communication; serves as slave select (active low) in SPI mode. |+| 22 | I/O_5 | bidirectional | I/O pin for parallel communication; serves as data clock output in direct mode 1. |+| 23 | I/O_6 | bidirectional | I/O pin for parallel communication; serves as MISO in SPI mode and as serial bit data output in direct mode 1 or subcarrier signal in direct mode 0. |+| 24 | I/O_7 | bidirectional | I/O pin for parallel communication; serves as MOSI in SPI mode. |+| 25 | EN2 | input | Selects power-down mode; if connected to VIN, VDD_X remains active during power-down mode 2. |+| 26 | DATA_CLK | input | Data clock input for MCU communication, parallel and serial. |+| 27 | SYS_CLK | output | System clock output for the MCU: with EN = 1 set by register 0x09 (off, 3.39 MHz, 6.78 MHz or 13.56 MHz); 60 kHz when EN = 0 and EN2 = 1. |+| 28 | EN | input | Chip enable input; when EN = 0 the chip is in sleep or power-down mode. |+| 29 | VSS_D | power_in | Negative supply for the internal digital circuits. |+| 30 | OSC_OUT | output | Crystal or oscillator output; can be left open when an external clock is applied to OSC_IN. |+| 31 | OSC_IN | input | Crystal or oscillator input for the 13.56 MHz system clock; an external clock source can be connected here. |+| 32 | VDD_X | power_out | Internally regulated supply output of 2.7 V to 3.4 V for digital circuits and external devices such as an MCU. |+| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HVQFN-32-EP(5x5) |+| Category | RF And Wireless |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `TRF7962ARHBR`+- Footprint: `Package_DFN_QFN:HVQFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm`+- 3D model: HVQFN-32-EP(5x5) (KiCad packages3D, STEP)+- 3D model files: `trf7962arhbr-etched.step` / `trf7962arhbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `trf7962arhbr.step` / `trf7962arhbr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/trf7962a) (73 pp, sha256 `7af772dcfc3be925`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/trf7962arhbr-datasheet.pdf)
page.jsonadded+352
@@ -0,0 +1,352 @@+{+  "slug": "trf7962arhbr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments RFID ICs, HVQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "rf and wireless",+    "trf7962arhbr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "trf7962arhbr.kicad_sym",+    "trf7962arhbr.kicad_mod",+    "trf7962arhbr.glb",+    "trf7962arhbr.step",+    "trf7962arhbr.lbr",+    "docs/hero.png",+    "docs/trf7962arhbr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "trf7962arhbr-hero.glb",+    "trf7962arhbr-hero.overlay.json"+  ],+  "component": {+    "mpn": "TRF7962ARHBR",+    "manufacturer": "Texas Instruments",+    "package": "HVQFN-32-EP(5x5)",+    "pin_count": 33,+    "category": "RF And Wireless",+    "subcategory": "RFID ICs",+    "datasheet": "https://www.ti.com/cn/lit/gpn/trf7962a",+    "parts": {+      "symbol": "trf7962arhbr.kicad_sym",+      "footprint": "trf7962arhbr.kicad_mod",+      "model_3d": "trf7962arhbr-hero.glb",+      "model_3d_plain": "trf7962arhbr.glb",+      "model_3d_step": "trf7962arhbr-etched.step",+      "model_3d_step_plain": "trf7962arhbr.step",+      "lbr": "trf7962arhbr.lbr"+    },+    "distributor_links": {+      "lcsc": "C80566",+      "digikey": "296-46402-2-ND",+      "mouser": "595-TRF7962ARHBR"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T00:07:18Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-46402-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-TRF7962ARHBR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "VDD_A",+        "type": "power_out",+        "description": "Internally regulated supply output of 2.7 V to 3.4 V for the analog circuitry."+      },+      {+        "number": "2",+        "name": "VIN",+        "type": "power_in",+        "description": "External supply input to the chip, 2.7 V to 5.5 V."+      },+      {+        "number": "3",+        "name": "VDD_RF",+        "type": "power_out",+        "description": "Internally regulated supply output of 2.7 V to 5 V, normally connected to VDD_PA (pin 4)."+      },+      {+        "number": "4",+        "name": "VDD_PA",+        "type": "power_in",+        "description": "Supply input for the power amplifier, normally connected externally to VDD_RF (pin 3)."+      },+      {+        "number": "5",+        "name": "TX_OUT",+        "type": "output",+        "description": "RF output with selectable output power of 100 mW or 200 mW when VDD = 5 V."+      },+      {+        "number": "6",+        "name": "VSS_PA",+        "type": "power_in",+        "description": "Negative supply for the power amplifier, normally connected to circuit ground."+      },+      {+        "number": "7",+        "name": "VSS_RX",+        "type": "power_in",+        "description": "Negative supply for the receive inputs, normally connected to circuit ground."+      },+      {+        "number": "8",+        "name": "RX_IN1",+        "type": "input",+        "description": "Main receive input."+      },+      {+        "number": "9",+        "name": "RX_IN2",+        "type": "input",+        "description": "Auxiliary receive input."+      },+      {+        "number": "10",+        "name": "VSS",+        "type": "power_in",+        "description": "Chip substrate ground."+      },+      {+        "number": "11",+        "name": "BAND_GAP",+        "type": "output",+        "description": "Internal analog voltage reference output, bandgap voltage VBG = 1.6 V."+      },+      {+        "number": "12",+        "name": "ASK/OOK",+        "type": "bidirectional",+        "description": "Selects ASK (0) or OOK (1) modulation for direct modes 0 and 1; can also be configured as an output providing the received analog signal."+      },+      {+        "number": "13",+        "name": "IRQ",+        "type": "output",+        "description": "Interrupt request output to the MCU."+      },+      {+        "number": "14",+        "name": "MOD",+        "type": "bidirectional",+        "description": "External data modulation input for direct mode 0 or 1, and subcarrier digital data output (see registers 0x1A and 0x1B)."+      },+      {+        "number": "15",+        "name": "VSS_A",+        "type": "power_in",+        "description": "Negative supply for the internal analog circuits, connected to GND."+      },+      {+        "number": "16",+        "name": "VDD_I/O",+        "type": "power_in",+        "description": "Supply for the I/O communication level shifter, 1.8 V up to VIN; VIN must never be exceeded."+      },+      {+        "number": "17",+        "name": "I/O_0",+        "type": "bidirectional",+        "description": "I/O pin for parallel communication; hard-wired (with I/O_1 and I/O_2) to select the SPI mode when SPI is used."+      },+      {+        "number": "18",+        "name": "I/O_1",+        "type": "bidirectional",+        "description": "I/O pin for parallel communication; hard-wired (with I/O_0 and I/O_2) to select the SPI mode when SPI is used."+      },+      {+        "number": "19",+        "name": "I/O_2",+        "type": "bidirectional",+        "description": "I/O pin for parallel communication; hard-wired (with I/O_0 and I/O_1) to select the SPI mode when SPI is used."+      },+      {+        "number": "20",+        "name": "I/O_3",+        "type": "bidirectional",+        "description": "I/O pin for parallel communication."+      },+      {+        "number": "21",+        "name": "I/O_4",+        "type": "bidirectional",+        "description": "I/O pin for parallel communication; serves as slave select (active low) in SPI mode."+      },+      {+        "number": "22",+        "name": "I/O_5",+        "type": "bidirectional",+        "description": "I/O pin for parallel communication; serves as data clock output in direct mode 1."+      },+      {+        "number": "23",+        "name": "I/O_6",+        "type": "bidirectional",+        "description": "I/O pin for parallel communication; serves as MISO in SPI mode and as serial bit data output in direct mode 1 or subcarrier signal in direct mode 0."+      },+      {+        "number": "24",+        "name": "I/O_7",+        "type": "bidirectional",+        "description": "I/O pin for parallel communication; serves as MOSI in SPI mode."+      },+      {+        "number": "25",+        "name": "EN2",+        "type": "input",+        "description": "Selects power-down mode; if connected to VIN, VDD_X remains active during power-down mode 2."+      },+      {+        "number": "26",+        "name": "DATA_CLK",+        "type": "input",+        "description": "Data clock input for MCU communication, parallel and serial."+      },+      {+        "number": "27",+        "name": "SYS_CLK",+        "type": "output",+        "description": "System clock output for the MCU: with EN = 1 set by register 0x09 (off, 3.39 MHz, 6.78 MHz or 13.56 MHz); 60 kHz when EN = 0 and EN2 = 1."+      },+      {+        "number": "28",+        "name": "EN",+        "type": "input",+        "description": "Chip enable input; when EN = 0 the chip is in sleep or power-down mode."+      },+      {+        "number": "29",+        "name": "VSS_D",+        "type": "power_in",+        "description": "Negative supply for the internal digital circuits."+      },+      {+        "number": "30",+        "name": "OSC_OUT",+        "type": "output",+        "description": "Crystal or oscillator output; can be left open when an external clock is applied to OSC_IN."+      },+      {+        "number": "31",+        "name": "OSC_IN",+        "type": "input",+        "description": "Crystal or oscillator input for the 13.56 MHz system clock; an external clock source can be connected here."+      },+      {+        "number": "32",+        "name": "VDD_X",+        "type": "power_out",+        "description": "Internally regulated supply output of 2.7 V to 3.4 V for digital circuits and external devices such as an MCU."+      },+      {+        "number": "33",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Pin name is BAND_GAP in the Table 4-1 signal list but BG in the pin diagram; the table name was used; Table 4-1 gives both an input and output function for these pins. They are typed bidirectional here;; Table 4-1 classifies these supply pins as INP (input). They are typed power_in because they are supp",+          "exposed pad 33 added from the footprint",+          "dropped thermal pad ['EP'] absent from footprint"+        ],+        "pages_sent": 13,+        "cost_usd": 0.089,+        "at": "2026-10-08T00:06:59"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/trf7962a",+        "pages": 73,+        "sha256": "7af772dcfc3be925",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 33,+        "described": 33,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "trf7962arhbr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          5,+          5,+          1.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "90af021df1253eae35bee4f4a4f9ba63bcf4a308f6e9f12d58f6e00181c23140",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "trf7962arhbr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          5,+          5,+          1.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "0ab4dec041b54da16187321934819e628cd9659da3f5f7a1798c3c1b369a1516",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file