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TRF7962ARHBR

Public Made by Adom

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Texas Instruments RFID ICs, HVQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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TRF7962ARHBR

Texas Instruments · RFID ICs · HVQFN-32-EP(5x5)

TRF7962ARHBR from Texas Instruments, in a HVQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD_A power_out Internally regulated supply output of 2.7 V to 3.4 V for the analog circuitry.
2 VIN power_in External supply input to the chip, 2.7 V to 5.5 V.
3 VDD_RF power_out Internally regulated supply output of 2.7 V to 5 V, normally connected to VDD_PA (pin 4).
4 VDD_PA power_in Supply input for the power amplifier, normally connected externally to VDD_RF (pin 3).
5 TX_OUT output RF output with selectable output power of 100 mW or 200 mW when VDD = 5 V.
6 VSS_PA power_in Negative supply for the power amplifier, normally connected to circuit ground.
7 VSS_RX power_in Negative supply for the receive inputs, normally connected to circuit ground.
8 RX_IN1 input Main receive input.
9 RX_IN2 input Auxiliary receive input.
10 VSS power_in Chip substrate ground.
11 BAND_GAP output Internal analog voltage reference output, bandgap voltage VBG = 1.6 V.
12 ASK/OOK bidirectional Selects ASK (0) or OOK (1) modulation for direct modes 0 and 1; can also be configured as an output providing the received analog signal.
13 IRQ output Interrupt request output to the MCU.
14 MOD bidirectional External data modulation input for direct mode 0 or 1, and subcarrier digital data output (see registers 0x1A and 0x1B).
15 VSS_A power_in Negative supply for the internal analog circuits, connected to GND.
16 VDD_I/O power_in Supply for the I/O communication level shifter, 1.8 V up to VIN; VIN must never be exceeded.
17 I/O_0 bidirectional I/O pin for parallel communication; hard-wired (with I/O_1 and I/O_2) to select the SPI mode when SPI is used.
18 I/O_1 bidirectional I/O pin for parallel communication; hard-wired (with I/O_0 and I/O_2) to select the SPI mode when SPI is used.
19 I/O_2 bidirectional I/O pin for parallel communication; hard-wired (with I/O_0 and I/O_1) to select the SPI mode when SPI is used.
20 I/O_3 bidirectional I/O pin for parallel communication.
21 I/O_4 bidirectional I/O pin for parallel communication; serves as slave select (active low) in SPI mode.
22 I/O_5 bidirectional I/O pin for parallel communication; serves as data clock output in direct mode 1.
23 I/O_6 bidirectional I/O pin for parallel communication; serves as MISO in SPI mode and as serial bit data output in direct mode 1 or subcarrier signal in direct mode 0.
24 I/O_7 bidirectional I/O pin for parallel communication; serves as MOSI in SPI mode.
25 EN2 input Selects power-down mode; if connected to VIN, VDD_X remains active during power-down mode 2.
26 DATA_CLK input Data clock input for MCU communication, parallel and serial.
27 SYS_CLK output System clock output for the MCU: with EN = 1 set by register 0x09 (off, 3.39 MHz, 6.78 MHz or 13.56 MHz); 60 kHz when EN = 0 and EN2 = 1.
28 EN input Chip enable input; when EN = 0 the chip is in sleep or power-down mode.
29 VSS_D power_in Negative supply for the internal digital circuits.
30 OSC_OUT output Crystal or oscillator output; can be left open when an external clock is applied to OSC_IN.
31 OSC_IN input Crystal or oscillator input for the 13.56 MHz system clock; an external clock source can be connected here.
32 VDD_X power_out Internally regulated supply output of 2.7 V to 3.4 V for digital circuits and external devices such as an MCU.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HVQFN-32-EP(5x5)
Category RF And Wireless
Pins 33

CAD (KiCad official)

  • Symbol: TRF7962ARHBR
  • Footprint: Package_DFN_QFN:HVQFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm
  • 3D model: HVQFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: trf7962arhbr-etched.step / trf7962arhbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); trf7962arhbr.step / trf7962arhbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (73 pp, sha256 7af772dcfc3be925, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF