component
TQL851CSV33 RLG
Public Made by Adomby adom
Taiwan Semiconductor Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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TQL851CSV33 RLG
Taiwan Semiconductor · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8-EP
TQL851CSV33 RLG from Taiwan Semiconductor, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Power supply pin for the system, with a recommended input range of 3V to 50V (VIN must be at least VOUT + Vdr, and extended VIN is 3 to 50V). |
| 2 | EN | input | Enable pin that is high-voltage tolerant (EN voltage to GND rated 0 to 50V recommended, -0.3 to 55V absolute); a high level (≥2V) enables the device and a low level (≤0.8V) disables it. |
| 3 | NC | unconnected | No connect pin; leave unconnected. |
| 4 | GND | power_in | Ground reference pin for the regulator; the exposed pad must also be connected to GND. |
| 5 | NC | unconnected | No connect pin; leave unconnected. |
| 6 | NC | unconnected | No connect pin; leave unconnected. |
| 7 | NC | unconnected | No connect pin; leave unconnected. |
| 8 | OUT | power_out | Regulated 3.3V output supply pin, rated for up to 500mA output current and requiring a stable output capacitor of at least 1μF with ESR of 100Ω or less. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Taiwan Semiconductor |
| Package | SOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power Supply Pin Voltage (absolute maximum) | VIN | 55 | V | 2 | |||
| EN Voltage to GND (absolute maximum) | VEN | -0.3 | 55 | V | 2 | ||
| OUT/RO/WDO Voltage to GND (absolute maximum) | VOUT/VRO/WDO | -0.3 | 7 | V | 2 | ||
| Junction Temperature Range (absolute maximum) | TJ | -40 | 150 | °C | 2 | ||
| Storage Temperature Range | TSTG | -55 | 150 | °C | 2 | ||
| ESD Rating (Human Body Model) | HBM | -2 | 2 | kV | Note 2 | 2 | |
| ESD Rating (Charged Device Model) | CDM | -1 | 1 | kV | 2 | ||
| Power Supply Pin VIN (recommended) | VIN | 50 | V | Minimum printed as VOUT+Vdr | 2 | ||
| Extended Power Supply Pin VIN,ext (recommended) | VIN,ext | 3 | 50 | V | 2 | ||
| EN Voltage to GND (recommended) | VEN | 0 | 50 | V | 2 | ||
| Output Stable Capacitor (recommended) | COUT | 1 | μF | 2 | |||
| ESR of Output Capacitor (recommended) | ESR | 100 | Ω | 2 | |||
| Operating Junction Temperature Range (recommended) | TJ | -40 | 150 | °C | 2 | ||
| Operating Ambient Temperature Range (recommended) | TOPA | -40 | 125 | °C | 2 | ||
| Output Voltage | VOUT | 3.23 | 3.3 | 3.37 | V | 0.05mA < IOUT < 500mA; 4.23V < VIN < 28V | 2 |
| Load Regulation | ΔVOUT,lo | -20 | -1.5 | 5 | mV | IOUT = 0.05 to 500mA; VIN = 6V | 2 |
| Line Regulation | ΔVOUT,li | -15 | 0 | 15 | mV | VIN = 8 to 32V; IOUT = 5mA | 3 |
| Dropout Voltage (Vdr=VIN-VOUT) | Vdr | 150 | 425 | mV | IOUT = 250mA | 3 | |
| Dropout Voltage (Vdr=VIN-VOUT) | Vdr | 60 | 170 | mV | IOUT = 100mA | 3 | |
| Thermal Shutdown Threshold | Tth | 151 | 200 | °C | Note 4 (guaranteed by design) | 3 | |
| Standby Current (IO=IIN) | IO,st | 1.3 | 5 | μA | VEN = 0V, TJ < 105°C | 3 | |
| Standby Current (IO=IIN) | IO,st | 8 | μA | VEN = 0.4V, TJ < 125°C | 3 | ||
| Quiescent Current (IO=IIN-IOUT) | IO | 30 | 40 | μA | IOUT = 0.05mA, TJ = 25°C | 3 | |
| Quiescent Current (IO=IIN-IOUT) | IO | 45 | 60 | μA | IOUT = 0.05mA, TJ < 125°C | 3 | |
| Enable High Level Input Voltage | VENH | 2 | V | 3 | |||
| Enable Low Level Input Voltage | VENL | 0.8 | V | VOUT ≦ 0.1V | 3 | ||
| Enable Threshold Hysteresis | VENHy | 100 | mV | 3 | |||
| EN Input Current | IEN | 3.5 | μA | VEN = 3.3V | 3 | ||
| EN Input Current | IEN | 22 | μA | VEN ≦ 18V | 3 | ||
| EN Pull-down Resistor | REN | 0.95 | 1.5 | 2.6 | MΩ | 3 | |
| Junction to Case Thermal Resistance | RӨJC | 12 | °C/W | 2 | |||
| Junction to Ambient Thermal Resistance | RӨJA | 50 | °C/W | 2 |
CAD (KiCad official)
- Symbol:
TQL851CSV33 RLG - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
tql851csv33-rlg-etched.step/tql851csv33-rlg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tql851csv33-rlg.step/tql851csv33-rlg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Taiwan Semiconductor datasheet (10 pp, sha256
f3d4a4528626f405, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).