← Commit history

tpw4053-sr: factory component page (tier=lcsc)

Ray ·00ea26ead9 ·1mo ago ·parent 887c101
1 file changed +164−8
page.json+164−8
@@ -1,13 +1,174 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "tpw4053-sr",+  "title": "TPW4053-SR",+  "brief": "3PEAK Analog Switches / Multiplexers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "3PEAK Analog Switches / Multiplexers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "comm-uart",     "tpw4053-sr"   ],+  "component": {+    "mpn": "TPW4053-SR",+    "manufacturer": "3PEAK",+    "package": "SOIC-16",+    "pin_count": 16,+    "category": "Comm/UART",+    "subcategory": "Analog Switches / Multiplexers",+    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2308251123_3PEAK-TPW4053-SR_C7500846.pdf",+    "parts": {+      "symbol": "tpw4053-sr.kicad_sym",+      "footprint": "tpw4053-sr.kicad_mod",+      "model_3d": "tpw4053-sr.glb",+      "model_3d_step": "tpw4053-sr.step",+      "lbr": "tpw4053-sr.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "B1",+        "type": "bidirectional",+        "description": "Channel B1 analog switch throw. Connects to common B (pin 15) when the B-channel select routes to the '1' side. Signal range VEE to VCC; \u00b125 mA max switch current."+      },+      {+        "number": "2",+        "name": "B0",+        "type": "bidirectional",+        "description": "Channel B0 analog switch throw. Connects to common B (pin 15) when the B-channel select routes to the '0' side. Signal range VEE to VCC; \u00b125 mA max switch current."+      },+      {+        "number": "3",+        "name": "C1",+        "type": "bidirectional",+        "description": "Channel C1 analog switch throw. Connects to common C (pin 4) when the C-channel select routes to the '1' side. Signal range VEE to VCC; \u00b125 mA max switch current."+      },+      {+        "number": "4",+        "name": "C",+        "type": "bidirectional",+        "description": "C common analog input/output. Routed to either C0 (pin 5) or C1 (pin 3) depending on the S2 select input and enable. Bidirectional analog signal path."+      },+      {+        "number": "5",+        "name": "C0",+        "type": "bidirectional",+        "description": "Channel C0 analog switch throw. Connects to common C (pin 4) when the C-channel select routes to the '0' side. Signal range VEE to VCC; \u00b125 mA max switch current."+      },+      {+        "number": "6",+        "name": "/E",+        "type": "input",+        "description": "Active-low enable input. When /E is LOW the selected switches are enabled per the S0/S1/S2 truth table; when /E is HIGH all three switches are turned off. Digital input, VIH = 2.0 V min (2.4 V at 9-11 V VCC), VIL = 0.8 V max. Must be held HIGH or LOW; do not float."+      },+      {+        "number": "7",+        "name": "VEE",+        "type": "power_in",+        "description": "Negative analog supply. Ground for single-supply operation (VEE = 0 V) or negative rail for dual-supply operation (VEE down to \u22125.5 V). Sets the lower analog signal limit; abs-max \u22126.5 V to 0.5 V vs GND."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Digital ground reference. VCC \u2212 GND recommended 3 V to 12 V; VEE \u2212 GND recommended \u22126 V to 0 V."+      },+      {+        "number": "9",+        "name": "S2",+        "type": "input",+        "description": "Select input for the C channel (selects C0 vs C1). Digital CMOS input, VIH = 2.0 V min (2.4 V at 9-11 V VCC), VIL = 0.8 V max; input leakage \u00b11 \u00b5A max. Must be driven HIGH or LOW, not floated."+      },+      {+        "number": "10",+        "name": "S1",+        "type": "input",+        "description": "Select input for the B channel (selects B0 vs B1). Digital CMOS input, VIH = 2.0 V min (2.4 V at 9-11 V VCC), VIL = 0.8 V max; input leakage \u00b11 \u00b5A max. Must be driven HIGH or LOW, not floated."+      },+      {+        "number": "11",+        "name": "S0",+        "type": "input",+        "description": "Select input for the A channel (selects A0 vs A1). Digital CMOS input, VIH = 2.0 V min (2.4 V at 9-11 V VCC), VIL = 0.8 V max; input leakage \u00b11 \u00b5A max. Must be driven HIGH or LOW, not floated."+      },+      {+        "number": "12",+        "name": "A0",+        "type": "bidirectional",+        "description": "Channel A0 analog switch throw. Connects to common A (pin 14) when the A-channel select routes to the '0' side. Signal range VEE to VCC; \u00b125 mA max switch current."+      },+      {+        "number": "13",+        "name": "A1",+        "type": "bidirectional",+        "description": "Channel A1 analog switch throw. Connects to common A (pin 14) when the A-channel select routes to the '1' side. Signal range VEE to VCC; \u00b125 mA max switch current."+      },+      {+        "number": "14",+        "name": "A",+        "type": "bidirectional",+        "description": "A common analog input/output. Routed to either A0 (pin 12) or A1 (pin 13) depending on the S0 select input and enable. Bidirectional analog signal path."+      },+      {+        "number": "15",+        "name": "B",+        "type": "bidirectional",+        "description": "B common analog input/output. Routed to either B0 (pin 2) or B1 (pin 1) depending on the S1 select input and enable. Bidirectional analog signal path."+      },+      {+        "number": "16",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply. Single-supply 3 V to 12 V above GND, or dual-supply 4.5-5.5 V above GND with VEE at \u22124.5 to \u22125.5 V. Sets the upper analog signal limit; abs-max \u22120.5 V to 13 V vs GND. ICC quiescent 4-16 \u00b5A typ over the supply range."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2308251123_3PEAK-TPW4053-SR_C7500846.pdf",+        "pages": 15,+        "sha256": "cdb913c6bba9a54e",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "3PEAK",+      "Package": "SOIC-16",+      "Category": "Comm/UART",+      "Pins": "16"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "tpw4053-sr"+  ],+  "discovery_pitch": "TPW4053-SR (3PEAK) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +186,5 @@     "docs/tpw4053-sr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file