component
TPV6823V-TR
Public Made by Adomby adom
3PEAK , SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPV6823V-TR
3PEAK · IC · SOT-23-5
TPV6823V-TR from 3PEAK, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | output | Active-low push-pull reset output that is asserted whenever VCC is below the reset threshold VTH, and is guaranteed to stay logic low down to VCC = 1 V. |
| 2 | GND | power_in | Ground reference pin for the device. |
| 3 | MR | input | Active-low manual reset input that generates a reset when forced low for at least 1 μs and has a 50-kΩ internal pull-up. |
| 4 | WDI | input | Watchdog input that generates a reset if its voltage stays low or high for the full watchdog timeout (1.6 s typical), with the timer cleared by any logic transition on the pin or by a reset. |
| 5 | VCC | power_in | Power supply voltage monitored by the device, with an operating range of 1 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 3PEAK |
| Package | SOT-23-5 |
| Category | |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Operating Voltage Range | VCC | 1 | 5.5 | V | 6 | ||
| Supply Current | ICC | 2.2 | 10 | μA | WDI and MR unconnected (VCC = 1.8 V) | 6 | |
| Supply Current | ICC | 6 | 25 | μA | WDI and MR unconnected (VCC = 5 V) | 6 | |
| Reset Threshold Voltage (TPV6823V) | VTH | 1.51 | 1.58 | 1.63 | V | 6 | |
| Reset Threshold Hysteresis | VHYS | 1000 | mV | 6 | |||
| Reset Timeout Period | tRP | 140 | 200 | 280 | ms | 6 | |
| Reset Output Voltage Low (Push-Pull) | VOL | 0.3 | V | VCC ≥ 1 V, ISINK = 50 μA | 6 | ||
| MR Input Pulse Width | tPW_MR | 1 | μs | 6 | |||
| Watchdog Timeout Period | tWD | 1.12 | 1.6 | 2.4 | s | 6 | |
| WDI Pulse Width | tPW_WD | 50 | ns | 7 | |||
| WDI Input Current | IWDI | 20 | μA | VWDI = VCC | 7 | ||
| WDI Input Current | IWDI | -15 | μA | VWDI = 0 | 7 | ||
| MR Glitch Rejection | tGR_MR | 100 | ns | 6 | |||
| MR to Reset Delay | td_MR | 200 | ns | 6 | |||
| VCC To Reset Delay | tRD | 20 | μs | VTH, VCC = 100 mV | 6 | ||
| MR Pull-Up Resistance | RPU_MR | 50 | kΩ | 6 | |||
| Reset Threshold Temperature Coefficient | 60 | ppm/°C | 6 | ||||
| Input Voltage VCC (absolute maximum) | VCC | -0.3 | 6 | V | 5 | ||
| Output Current RESET | 20 | mA | 5 | ||||
| TJ Maximum Junction Temperature | TJ | -40 | 125 | °C | 5 | ||
| TSTG Storage Temperature Range | TSTG | -65 | 150 | °C | 5 | ||
| TL Lead Temperature (Soldering 10 sec) | TL | 260 | °C | Soldering 10 sec | 5 | ||
| Operating Temperature Range | -40 | 125 | °C | 15 | |||
| Thermal Resistance Junction-to-Ambient (SOT23-5) | θJA | 128 | °C/W | 5 | |||
| Thermal Resistance Junction-to-Case (SOT23-5) | θJC | 67 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
TPV6823V-TR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tpv6823v-tr-etched.step/tpv6823v-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpv6823v-tr.step/tpv6823v-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 3PEAK datasheet (16 pp, sha256
0f9a697ed33cc9c5, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPV6823V-TR
**3PEAK** · IC · SOT-23-5
TPV6823V-TR from 3PEAK, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | output | Active-low push-pull reset output that is asserted whenever VCC is below the reset threshold VTH, and is guaranteed to stay logic low down to VCC = 1 V. |
| 2 | GND | power_in | Ground reference pin for the device. |
| 3 | MR | input | Active-low manual reset input that generates a reset when forced low for at least 1 μs and has a 50-kΩ internal pull-up. |
| 4 | WDI | input | Watchdog input that generates a reset if its voltage stays low or high for the full watchdog timeout (1.6 s typical), with the timer cleared by any logic transition on the pin or by a reset. |
| 5 | VCC | power_in | Power supply voltage monitored by the device, with an operating range of 1 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 3PEAK |
| Package | SOT-23-5 |
| Category | |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Operating Voltage Range | VCC | 1 | | 5.5 | V | | 6 |
| Supply Current | ICC | | 2.2 | 10 | μA | WDI and MR unconnected (VCC = 1.8 V) | 6 |
| Supply Current | ICC | | 6 | 25 | μA | WDI and MR unconnected (VCC = 5 V) | 6 |
| Reset Threshold Voltage (TPV6823V) | VTH | 1.51 | 1.58 | 1.63 | V | | 6 |
| Reset Threshold Hysteresis | VHYS | | | 1000 | mV | | 6 |
| Reset Timeout Period | tRP | 140 | 200 | 280 | ms | | 6 |
| Reset Output Voltage Low (Push-Pull) | VOL | | | 0.3 | V | VCC ≥ 1 V, ISINK = 50 μA | 6 |
| MR Input Pulse Width | tPW_MR | 1 | | | μs | | 6 |
| Watchdog Timeout Period | tWD | 1.12 | 1.6 | 2.4 | s | | 6 |
| WDI Pulse Width | tPW_WD | 50 | | | ns | | 7 |
| WDI Input Current | IWDI | | | 20 | μA | VWDI = VCC | 7 |
| WDI Input Current | IWDI | -15 | | | μA | VWDI = 0 | 7 |
| MR Glitch Rejection | tGR_MR | | | 100 | ns | | 6 |
| MR to Reset Delay | td_MR | | | 200 | ns | | 6 |
| VCC To Reset Delay | tRD | | 20 | | μs | VTH, VCC = 100 mV | 6 |
| MR Pull-Up Resistance | RPU_MR | | 50 | | kΩ | | 6 |
| Reset Threshold Temperature Coefficient | | | 60 | | ppm/°C | | 6 |
| Input Voltage VCC (absolute maximum) | VCC | -0.3 | | 6 | V | | 5 |
| Output Current RESET | | | | 20 | mA | | 5 |
| TJ Maximum Junction Temperature | TJ | -40 | | 125 | °C | | 5 |
| TSTG Storage Temperature Range | TSTG | -65 | | 150 | °C | | 5 |
| TL Lead Temperature (Soldering 10 sec) | TL | | | 260 | °C | Soldering 10 sec | 5 |
| Operating Temperature Range | | -40 | | 125 | °C | | 15 |
| Thermal Resistance Junction-to-Ambient (SOT23-5) | θJA | | 128 | | °C/W | | 5 |
| Thermal Resistance Junction-to-Case (SOT23-5) | θJC | | 67 | | °C/W | | 5 |
## CAD (KiCad official)
- Symbol: `TPV6823V-TR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tpv6823v-tr-etched.step` / `tpv6823v-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpv6823v-tr.step` / `tpv6823v-tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [3PEAK datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590907462046601216) (16 pp, sha256 `0f9a697ed33cc9c5`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tpv6823v-tr-datasheet.pdf)