component

TPUL2T323PWR

Public Made by Adom

by adom

Texas Instruments Monostable Multivibrators, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogictpul2t323pwrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5d ago
viewers tpul2t323pwr: viewers · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago
tpul2t323pwr-etched.glb Publish 0.1.0 · Ray 5d ago
tpul2t323pwr-etched.step tpul2t323pwr: factory component page (tier=mfr) · Ray 5d ago
tpul2t323pwr-hero.glb tpul2t323pwr: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
tpul2t323pwr-hero.overlay.json Publish 0.1.0 · Ray 5d ago
tpul2t323pwr.glb Publish 0.1.0 · Ray 5d ago
tpul2t323pwr.kicad_mod Publish 0.1.0 · Ray 5d ago
tpul2t323pwr.kicad_sym Publish 0.1.0 · Ray 5d ago
tpul2t323pwr.lbr Publish 0.1.0 · Ray 5d ago
tpul2t323pwr.step Publish 0.1.0 · Ray 5d ago

TPUL2T323PWR

Texas Instruments · Monostable Multivibrators · TSSOP-16

TPUL2T323PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1T input Channel 1 falling edge trigger input; requires 1T and 1CLR to be held high.
2 1T input Channel 1 rising edge trigger input; requires 1T to be held low and 1CLR to be held high.
3 1CLR input Channel 1 asynchronous clear input, active low; can also operate as rising edge trigger input if 1T is held low and 1T is held high.
4 1Q output Channel 1 inverted output.
5 2Q output Channel 2 output.
6 2C power_in Channel 2 external timing capacitor negative connection; provides a return path for discharge current of the external timing capacitor and is internally connected to ground.
7 2RC bidirectional Channel 2 external timing node connection; see Application Information section for detailed operation instructions.
8 GND power_in Ground.
9 2T input Channel 2 falling edge trigger input; requires 2T and 2CLR to be held high.
10 2T input Channel 2 rising edge trigger input; requires 2T to be held low and 2CLR to be held high.
11 2CLR input Channel 2 asynchronous clear input, active low; can also operate as rising edge trigger input if 2T is held low and 2T is held high.
12 2Q output Channel 2 inverted output.
13 1Q output Channel 1 output.
14 1C power_in Channel 1 external timing capacitor negative connection; provides a return path for discharge current of the external timing capacitor and is internally connected to ground.
15 1RC bidirectional Channel 1 external timing node connection; see Application Information section for detailed operation instructions.
16 VCC power_in Positive voltage supply; recommended operating range is 1.5 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 6.5 V 4
Digital input voltage range VI -0.5 6.5 V 4
Digital output current, continuous IO -50 50 mA VO = 0 to VCC 4
Digital output current, pulsed IO -200 200 mA pulsed 1µs, VO = 0 to VCC 4
Continuous current through VCC or GND -200 200 mA 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Supply voltage VCC 1.5 5.5 V 4
Input voltage VI 0 5.5 V 4
High-level output current IOH -4 mA VCC = 1.5V 4
High-level output current IOH -50 mA VCC = 3.3V 4
Low-level output current IOL 4 mA VCC = 1.5V 5
Low-level output current IOL 50 mA VCC = 3.3V 5
External timing resistance Rext 6.5 1000 kΩ VCC = 1.5V to 5.5V 5
External timing capacitance Cext 0.1 1000 nF VCC = 1.5V to 5.5V 5
Configured output pulse width two 0.01 880 s VCC = 1.5V to 5.5V 5
Operating free-air temperature TA -40 125 °C 5
Positive switching threshold VT+ 0.65 0.84 0.96 V VCC = 1.5V 5
Positive switching threshold VT+ 0.73 0.95 1.11 V VCC = 1.8V 5
Positive switching threshold VT+ 0.88 1.11 1.33 V VCC = 2.5V 5
Positive switching threshold VT+ 1.03 1.27 1.5 V VCC = 3.3V 5
Positive switching threshold VT+ 1.33 1.58 1.82 V VCC = 5V 5
Positive switching threshold VT+ 1.41 1.67 1.91 V VCC = 5.5V 5
Negative switching threshold VT- 0.32 0.41 0.5 V VCC = 1.5V 5
Negative switching threshold VT- 0.36 0.46 0.53 V VCC = 1.8V 5
Negative switching threshold VT- 0.45 0.55 0.63 V VCC = 2.5V 5
Negative switching threshold VT- 0.54 0.65 0.74 V VCC = 3.3V 5
Negative switching threshold VT- 0.7 0.85 0.96 V VCC = 5V 5
Negative switching threshold VT- 0.74 0.89 1.02 V VCC = 5.5V 5
High-level output voltage VOH 1.2 1.61 V IOH = -1mA, VCC = 1.65V 6
High-level output voltage VOH 2.1 2.24 V IOH = -2mA, VCC = 2.3V 6
High-level output voltage VOH 2.4 2.78 V IOH = -8mA, VCC = 3V 6
High-level output voltage VOH 3.94 4.21 V IOH = -12mA, VCC = 4.5V 6
High-level output voltage VOH 4.94 5.23 V IOH = -12mA, VCC = 5.5V 6
Low-level output voltage VOL 0.01 0.1 V IOL = 50µA, VCC = 1.5V - 5.5V 6
Low-level output voltage VOL 0.03 0.45 V IOL = 1mA, VCC = 1.65V 6
Low-level output voltage VOL 0.04 0.2 V IOL = 2mA, VCC = 2.3V 6
Low-level output voltage VOL 0.13 0.4 V IOL = 8mA, VCC = 3V 6
Low-level output voltage VOL 0.15 0.5 V IOL = 12mA, VCC = 4.5V 6
Low-level output voltage VOL 0.13 0.5 V IOL = 12mA, VCC = 5.5V 6
Input leakage current II -50 50 nA VI = 5.5V or 0V; VCC = 0V to 5.5V 6
Supply current, ready state ICC 0.19 2 µA Ready state, VI = VCC or 0V, IO = 0; VCC = 5.5V 6
Propagation delay, T, T̅, or CLR to Q or Q̅ tpd 7 37 67 ns CL = 50pF, VCC = 1.5V 9
Propagation delay, T, T̅, or CLR to Q or Q̅ tpd 6 30.2 53 ns CL = 50pF, VCC = 1.65V 9
Propagation delay, T, T̅, or CLR to Q or Q̅ tpd 4 17.6 30 ns CL = 50pF, VCC = 2.3V 9
Propagation delay, T, T̅, or CLR to Q or Q̅ tpd 3 13 22 ns CL = 50pF, VCC = 3V 9
Propagation delay, T, T̅, or CLR to Q or Q̅ tpd 2 9.8 16 ns CL = 50pF, VCC = 4.5V 9
Propagation delay, T, T̅, or CLR to Q or Q̅ tpd 2 9.6 14 ns CL = 50pF, VCC = 5.5V 9
Variation in output pulse width (delta two) Δtwo -10 1 10 % CL = 50pF, VCC = 1.5V to 5.5V 10
Output pulse width (two), Rext = 10kΩ, Cext = 0.1µF two 831 934 1017 ms Rext = 10kΩ; Cext = 0.1µF; CL = 50pF; VCC = 1.5V 10
Output pulse width (two), Rext = 10kΩ, Cext = 0.1µF two 832 934 1018 ms Rext = 10kΩ; Cext = 0.1µF; CL = 50pF; VCC = 1.65V 10
Output pulse width (two), Rext = 10kΩ, Cext = 0.1µF two 837 932 1024 ms Rext = 10kΩ; Cext = 0.1µF; CL = 50pF; VCC = 2.3V 10
Output pulse width (two), Rext = 10kΩ, Cext = 0.1µF two 842 938 1030 ms Rext = 10kΩ; Cext = 0.1µF; CL = 50pF; VCC = 3V 10
Output pulse width (two), Rext = 10kΩ, Cext = 0.1µF two 852 949 1043 ms Rext = 10kΩ; Cext = 0.1µF; CL = 50pF; VCC = 4.5V 10
Output pulse width (two), Rext = 10kΩ, Cext = 0.1µF two 857 954 1049 ms Rext = 10kΩ; Cext = 0.1µF; CL = 50pF; VCC = 5.5V 10
Junction-to-ambient thermal resistance, PW (TSSOP) RθJA 138.3 °C/W PW (TSSOP) 16-pin package 5
Junction-to-case (top) thermal resistance, PW (TSSOP) RθJC(top) 75.1 °C/W PW (TSSOP) 16-pin package 5
Junction-to-board thermal resistance, PW (TSSOP) RθJB 96.5 °C/W PW (TSSOP) 16-pin package 5

CAD (KiCad official)

  • Symbol: TPUL2T323PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: tpul2t323pwr-etched.step / tpul2t323pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpul2t323pwr.step / tpul2t323pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (52 pp, sha256 7d1471a3ed2a96b9, retrieved 2026-10-19, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF