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TPUL2G123PWR

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Texas Instruments Monostable Multivibrators, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPUL2G123PWR

Texas Instruments · Monostable Multivibrators · TSSOP-16

TPUL2G123PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1T input Channel 1 falling edge trigger input; requires 1T and 1CLR to be held high.
2 1T input Channel 1 rising edge trigger input; requires 1T to be held low and 1CLR to be held high.
3 1CLR input Channel 1 asynchronous clear input, active low; also can operate as rising edge trigger input if 1T is held low and 1T is held high.
4 1Q output Channel 1 inverted output.
5 2Q output Channel 2 output.
6 2C power_in Channel 2 external timing capacitor negative connection; provides a return path for discharge current of the external timing capacitor; internally connected to ground.
7 2RC bidirectional Channel 2 external timing node connection; see Application Information section for detailed operation instructions.
8 GND power_in Ground.
9 2T input Channel 2 falling edge trigger input; requires 2T and 2CLR to be held high.
10 2T input Channel 2 rising edge trigger input; requires 2T to be held low and 2CLR to be held high.
11 2CLR input Channel 2 asynchronous clear input, active low; also can operate as rising edge trigger input if 2T is held low and 2T is held high.
12 2Q output Channel 2 inverted output.
13 1Q output Channel 1 output.
14 1C power_in Channel 1 external timing capacitor negative connection; provides a return path for discharge current of the external timing capacitor; internally connected to ground.
15 1RC bidirectional Channel 1 external timing node connection; see Application Information section for detailed operation instructions.
16 VCC power_in Positive voltage supply.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 6.5 V 4
Digital input voltage range VI -0.5 6.5 V 4
Digital output voltage range in the active state VO -0.5 V 4
Digital output voltage range in the high-impedance state VO -0.5 6.5 V 4
RC pin voltage range VRC -0.5 V 4
Input clamp diode current, continuous IIK -20 mA VI < -0.5V 4
Input clamp diode current, pulsed IIK -200 mA VI < -0.5V, pulsed 1µs 4
Output clamp diode current, continuous IOK -20 mA VO < -0.5V 4
Output clamp diode current, pulsed IOK -200 mA VO < -0.5V, pulsed 1µs 4
Digital output current, continuous IO -50 50 mA VO = 0 to VCC 4
Digital output current, pulsed IO -200 200 mA VO = 0 to VCC, pulsed 1µs 4
Continuous current through VCC or GND -200 200 mA 4
External timing resistance (absolute maximum) Rext 1 kΩ 4
External timing capacitance (absolute maximum) Cext 1 µF 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Supply voltage VCC 1.5 5.5 V 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 V 4
High-level output current IOH -4 mA VCC = 1.5V 4
High-level output current IOH -6 mA VCC = 1.8V 4
High-level output current IOH -26 mA VCC = 2.5V 4
High-level output current IOH -50 mA VCC = 3.3V 4
Low-level output current IOL 4 mA VCC = 1.5V 5
Low-level output current IOL 6 mA VCC = 1.8V 5
Low-level output current IOL 26 mA VCC = 2.5V 5
Low-level output current IOL 50 mA VCC = 3.3V 5
External timing resistance Rext 6.5 1000 kΩ VCC = 1.5V to 5.5V 5
External timing capacitance Cext 0.1 1000 nF VCC = 1.5V to 5.5V 5
Configured output pulse width two 0.001 860 ms VCC = 1.5V to 5.5V 5
Digital output load capacitance CL 50 pF VCC = 1.5V to 5.5V 5
Power-on reset ramp voltage VPOR 0.3 1.5 V Δt/ΔVCC ≥ 20µs/V 5
Power-on ramp rate Δt/ΔVCC 20 µs/V VCC = 0.3V to 1.5V 5
Input transition rise or fall rate Δt/Δv 100 ms/V VCC = 1.5V to 5.5V 5
Operating free-air temperature TA -40 125 °C 5
Partial power-off current Ioff 0.25 10 µA VI or VO = 5.5V or 0V; VCC = 0V to 0.3V 6
Input leakage current II -50 50 nA VI = 5.5V or 0V; VCC = 0V to 5.5V 6
Capacitor pin current, monitor state ICEXT -50 50 nA Monitor state, VCEXT = 0.5 × VCC; VCC = 1.5V to 5.5V 6
Supply current, ready state ICC 0.19 2 µA Ready state, VI = VCC or 0V, IO = 0; VCC = 5.5V 6
Supply-current change ΔICC 1.5 mA One input VI = 0 to VCC, all other inputs at VCC or 0V, IO = 0mA; VCC = 1.5V to 5.5V 6
Supply current, active state per channel ICC 40 µA Active state per channel, VI = VCC or 0V, IO = 0; VCC = 1.5V 6
Supply current, active state per channel ICC 195 µA Active state per channel, VI = VCC or 0V, IO = 0; VCC = 5.5V 6
Low-level output voltage VOL 0.01 0.1 V IOL = 50µA; VCC = 1.5V - 5.5V 6
Low-level output voltage VOL 0.03 0.45 V IOL = 1mA; VCC = 1.65V 6
Low-level output voltage VOL 0.04 0.2 V IOL = 2mA; VCC = 2.3V 6
Low-level output voltage VOL 0.13 0.4 V IOL = 8mA; VCC = 3V 6
Low-level output voltage VOL 0.15 0.5 V IOL = 12mA; VCC = 4.5V 6
Low-level output voltage VOL 0.13 0.5 V IOL = 12mA; VCC = 5.5V 6
High-level output voltage VOH 1.2 1.61 V IOH = -1mA; VCC = 1.65V 6
High-level output voltage VOH 2.1 2.24 V IOH = -2mA; VCC = 2.3V 6
High-level output voltage VOH 2.4 2.78 V IOH = -8mA; VCC = 3V 6
High-level output voltage VOH 3.94 4.21 V IOH = -12mA; VCC = 4.5V 6
High-level output voltage VOH 4.94 5.23 V IOH = -12mA; VCC = 5.5V 6
Thermal resistance, junction-to-ambient RθJA 138.3 °C/W PW (TSSOP) 16-pin 5
Thermal resistance, junction-to-case (top) RθJC(top) 75.1 °C/W PW (TSSOP) 16-pin 5
Thermal resistance, junction-to-board RθJB 96.5 °C/W PW (TSSOP) 16-pin 5
Junction-to-top characterization parameter ΨJT 19.4 °C/W PW (TSSOP) 16-pin 5
Junction-to-board characterization parameter ΨJB 95.5 °C/W PW (TSSOP) 16-pin 5

CAD (KiCad official)

  • Symbol: TPUL2G123PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: tpul2g123pwr-etched.step / tpul2g123pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpul2g123pwr.step / tpul2g123pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (47 pp, sha256 5d6bf4c434ec0357, retrieved 2026-10-19, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF