component

TPTLV76033DBZR

Public Made by Adom

by adom

TECH PUBLIC Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tptlv76033dbzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tptlv76033dbzr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md tptlv76033dbzr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
tptlv76033dbzr-etched.fit.json tptlv76033dbzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tptlv76033dbzr-etched.glb tptlv76033dbzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tptlv76033dbzr-etched.step tptlv76033dbzr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tptlv76033dbzr.glb Publish 0.1.0 · Ray
tptlv76033dbzr.kicad_mod Publish 0.1.0 · Ray
tptlv76033dbzr.kicad_sym Publish 0.1.0 · Ray
tptlv76033dbzr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tptlv76033dbzr.step Publish 0.1.0 · Ray

TPTLV76033DBZR

TECH PUBLIC · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23

TPTLV76033DBZR from TECH PUBLIC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated 3.3V output pin. Delivers up to 100mA (peak 150mA) with typical 4% tolerance. Requires a 0.1µF output capacitor (C0) to ground for stability.
2 IN power_in Unregulated DC input voltage pin. Maximum DC input voltage 30V for the 3.3V variant; typical operating range 5.8V to 20V. Requires a 0.33µF input capacitor (Ci) to ground.
3 GND power_in Common ground reference for input and output. Serves as the return path for both input bypass and load current.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • TPTLV76033DBZR
  • TPTLV76050DBZR
  • TPTLV76012DBZR
  • TPTLV76015DBZR

CAD (KiCad official)

  • Symbol: TPTLV76033DBZR
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: tptlv76033dbzr-etched.step / tptlv76033dbzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tptlv76033dbzr.step / tptlv76033dbzr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tptlv76033dbzr.step 59 KB You want the bare part, or you mark your own boards.
tptlv76033dbzr-etched.step 2.2 MB You want the part with TPTLV76033DBZR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 551 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (6 pp, sha256 e151c53ad47b86ea, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF