component
TPT75176B-SO1R
Public Made by Adomby adom
3PEAK Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
tpt75176b-so1r: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
2907d14
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{
"schema_version": 1,
"type": "component",
"slug": "tpt75176b-so1r",
"title": "TPT75176B-SO1R",
"brief": "3PEAK Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
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],
"component": {
"mpn": "TPT75176B-SO1R",
"manufacturer": "3PEAK",
"package": "SOP-8",
"pin_count": 8,
"category": "PMIC",
"subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
"datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2311140936_3PEAK-TPT75176B-SO1R_C2902365.pdf",
"parts": {
"symbol": "tpt75176b-so1r.kicad_sym",
"footprint": "tpt75176b-so1r.kicad_mod",
"model_3d": "tpt75176b-so1r-etched.glb",
"model_3d_plain": "tpt75176b-so1r.glb",
"model_3d_step": "tpt75176b-so1r-etched.step",
"model_3d_step_plain": "tpt75176b-so1r.step",
"lbr": "tpt75176b-so1r.lbr"
},
"distributor_links": {
"lcsc": "C2902365"
},
"pins": [
{
"number": "1",
"name": "R",
"type": "output",
"description": "Receiver output. Drives logic-high when VID = VA - VB > VIT+ (typ -10 mV), logic-low when VID < VIT- (typ -130 mV). High-drive output (>25 mA typ @ VOL=1V) suitable for driving optically isolated interfaces. Full fail-safe: outputs high when bus is open, shorted, or idle. High-Z when /RE is high or open."
},
{
"number": "2",
"name": "/RE",
"type": "input",
"description": "Receiver enable (active-low). Drive low to enable the receiver; drive high (or leave open) to place the R output in high-impedance. Logic input thresholds VIH ≥ 2 V, VIL ≤ 0.8 V; input current ±2 μA max."
},
{
"number": "3",
"name": "DE",
"type": "input",
"description": "Driver enable (active-high). Drive high to enable the driver output onto A/B; drive low (or leave open) to place A/B in high-impedance. Logic input thresholds VIH ≥ 2 V, VIL ≤ 0.8 V; input current ±2 μA max."
},
{
"number": "4",
"name": "D",
"type": "input",
"description": "Driver data input. When DE is high, a logic-high on D drives bus A high and B low; logic-low drives A low and B high. Logic input thresholds VIH ≥ 2 V, VIL ≤ 0.8 V; input current ±2 μA max. Floating D with DE=H results in driving bus high (internal pull-up behavior)."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device. Connect to system ground."
},
{
"number": "6",
"name": "A",
"type": "bidirectional",
"description": "Non-inverting RS-485 differential bus pin. Driver output when DE=H; receiver non-inverting input when /RE=L. Common-mode range -7 V to +12 V; absolute limits -9 V to +14 V (±100 V transient through 100 Ω). ±12 kV HBM / ±8 kV IEC contact / ±15 kV IEC air-discharge ESD protected."
},
{
"number": "7",
"name": "B",
"type": "bidirectional",
"description": "Inverting RS-485 differential bus pin. Driver output when DE=H; receiver inverting input when /RE=L. Common-mode range -7 V to +12 V; absolute limits -9 V to +14 V (±100 V transient through 100 Ω). ±12 kV HBM / ±8 kV IEC contact / ±15 kV IEC air-discharge ESD protected."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage input. Recommended operating range 3.0 V to 5.5 V; absolute max 7 V. Quiescent supply current 3 mA typical (both driver and receiver enabled). Bypass locally with a 0.1 μF ceramic capacitor to GND."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2311140936_3PEAK-TPT75176B-SO1R_C2902365.pdf",
"pages": 10,
"sha256": "e7813b3b66193828",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
},
"models_3d": [
{
"file": "tpt75176b-so1r.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "tpt75176b-so1r-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "e0758be15b72c7983929c03f5285253d0bfd5475f5bce2f2b906ba7fdf34d84c",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "3PEAK",
"Package": "SOP-8",
"Category": "PMIC",
"Pins": "8"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"tpt75176b-so1r"
],
"discovery_pitch": "TPT75176B-SO1R (3PEAK) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"tpt75176b-so1r.kicad_sym",
"tpt75176b-so1r.kicad_mod",
"tpt75176b-so1r.glb",
"tpt75176b-so1r.step",
"tpt75176b-so1r-etched.step",
"tpt75176b-so1r.lbr",
"docs/hero.png",
"docs/tpt75176b-so1r-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "TPT75176B-SO1R",
"kind": "packaging"
},
{
"mpn": "TPT75176B-SO1RVS1R",
"kind": "packaging"
},
{
"mpn": "TPT75176B-SO1RDF6R",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T12:52:14.258Z"
}