component

TPT485E-SO1R

Public Made by Adom

by adom

3PEAK RS-485 / RS-422 ICs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tpt485e-so1r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tpt485e-so1r: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md tpt485e-so1r: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
tpt485e-so1r-etched.fit.json tpt485e-so1r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tpt485e-so1r-etched.glb tpt485e-so1r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tpt485e-so1r-etched.step tpt485e-so1r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tpt485e-so1r.glb Publish 0.1.0 · Ray
tpt485e-so1r.kicad_mod Publish 0.1.0 · Ray
tpt485e-so1r.kicad_sym Publish 0.1.0 · Ray
tpt485e-so1r.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tpt485e-so1r.step Publish 0.1.0 · Ray

TPT485E-SO1R

3PEAK · RS-485 / RS-422 ICs · SOP-8

TPT485E-SO1R from 3PEAK, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver Output. Digital CMOS output carrying the recovered data from the differential bus (A-B). Logic high when VID > VIT+ (typ -15 mV); high-Z when receiver is disabled (/RE = high or open). VOH ≥ 4.0V @ IOH = -8 mA; VOL ≤ 0.4V @ IOL = 8 mA.
2 /RE input Receiver Output Enable, active low. Drive low to enable the receiver output RO; drive high (or leave open) to place RO in high-Z. VIH = 2V min, VIL = 0.8V max. Tie to GND for permanent receive mode.
3 DE input Driver Output Enable, active high. Drive high to enable the differential driver onto A/B; drive low (or leave open) to place A/B in high-Z (driver disabled). VIH = 2V min, VIL = 0.8V max.
4 DI input Driver Input. Digital CMOS input that drives the RS-485 differential bus when DE is asserted. DI=H drives A high / B low; DI=L drives A low / B high. If DI is left open with DE high, the driver defaults to the 'bus high' state (A high, B low). VIH = 2V min, VIL = 0.8V max.
5 GND power_in Ground reference for the device. Connect to system ground.
6 A bidirectional Noninverting RS-485 bus pin: driver noninverting output and receiver noninverting input. Withstands -15V to +15V continuous and ±100V transient (through 100Ω), ±18kV HBM and ±12kV IEC61000-4-2 contact discharge. Bus input impedance ≥ 96 kΩ (1/8 unit load). Common-mode range -7V to +12V.
7 B bidirectional Inverting RS-485 bus pin: driver inverting output and receiver inverting input. Same protection and impedance ratings as A. Together with A forms the differential RS-485 pair (VID = VA - VB).
8 VCC power_in Supply voltage input, 4.5V to 5.5V (absolute max 7V). Decouple to GND with a 0.1 µF ceramic capacitor near the pin. Typical quiescent supply current is 650 µA with both driver and receiver enabled; <1 µA in shutdown (DE=GND, /RE=DI=VCC).

Key specifications

Parameter Value
Manufacturer 3PEAK
Package SOP-8
Category Interface
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • TPT485E-SO1R

CAD (KiCad official)

  • Symbol: TPT485E-SO1R
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: tpt485e-so1r-etched.step / tpt485e-so1r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpt485e-so1r.step / tpt485e-so1r.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tpt485e-so1r.step 122 KB You want the bare part, or you mark your own boards.
tpt485e-so1r-etched.step 2.2 MB You want the part with TPT485E-SO1R already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 561 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: 3PEAK datasheet (8 pp, sha256 43d4afd779e259fc, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF