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TPT481-VS1R
Public Made by Adomby adom
3PEAK RS-485 / RS-422 ICs, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPT481-VS1R
3PEAK · RS-485 / RS-422 ICs · MSOP-8
TPT481-VS1R from 3PEAK, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R | output | Receiver output: goes high for a valid bus-high input and low for a valid bus-low input, and is high-impedance when the receiver is disabled. |
| 2 | /RE | input | Active-low receiver output enable: when this pin is high, the receiver is disabled and R is high-impedance. |
| 3 | DE | input | Driver output enable: when high, the driver is enabled; when low, outputs A and B are high-impedance. |
| 4 | D | input | Driver input: when the driver is enabled, a high on D drives A high and B low, and a low on D drives A low and B high. |
| 5 | GND | power_in | Ground reference for the device. |
| 6 | A | bidirectional | Noninverting receiver input A and noninverting driver output A on the RS-485 bus. |
| 7 | B | bidirectional | Inverting receiver input B and inverted driver output B on the RS-485 bus. |
| 8 | VCC | power_in | Power supply input, specified for 3.0 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 3PEAK |
| Package | MSOP-8 |
| Category | Interface |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Supply voltage | VCC | 3 | 5.5 | V | 5 | ||
| Input voltage at any bus terminal | VI | -7 | 12 | V | 5 | ||
| Differential input voltage | VID | -7 | 12 | V | 5 | ||
| Operating ambient temperature | TA | -40 | 125 | °C | 5 | ||
| Junction temperature | TJ | -40 | 150 | °C | 5 | ||
| Differential load resistance | RL | 54 | Ω | 5 | |||
| High-level input voltage (driver, driver enable, receiver enable inputs) | VIH | 2 | V | driver, driver enable, and receiver enable inputs; max printed as VCC | 5 | ||
| Low-level input voltage (driver, driver enable, receiver enable inputs) | VIL | 0 | 0.8 | V | driver, driver enable, and receiver enable inputs | 5 | |
| VCC to GND | VCC | -0.3 | 7 | V | 5 | ||
| Voltage at logic pin D, DE, /RE, R | -0.3 | V | max printed as VCC + 0.3 V | 5 | |||
| Voltage at bus pin A, B | -15 | 15 | V | note (1): ±15V in receiver mode; -8 to +13V in driver mode | 5 | ||
| Operating temperature range | -40 | 125 | °C | 5 | |||
| Storage temperature range | -65 | 150 | °C | 5 | |||
| Maximum junction temperature | 150 | °C | 5 | ||||
| Lead temperature (soldering) | 260 | °C | 10 sec soldering | 5 | |||
| Driver differential-output voltage magnitude | /VOD/ | 2.1 | 2.7 | V | RL = 60 Ω with VA or VB from -7 to +12 V, VCC = 4.5V~5.5V, See Figure 1B | 7 | |
| Driver differential-output voltage magnitude | /VOD/ | 1.5 | 2.3 | V | RL = 60 Ω with VA or VB from -7 to +12 V, VCC = 3.0~3.6V, See Figure 1B | 7 | |
| Change in magnitude of driver differential-output voltage | ⊿/VOD/ | -50 | 50 | mV | RL = 54 Ω, CL=50 pF, VCC = 5V, See Figure 1A | 7 | |
| Steady-stage common-mode output voltage | VOC(SS) | 1 | 3 | V | Center of two 27 Ω load resistors, See Figure 1A; typ printed VCC/2 | 7 | |
| Change in differential driver common-mode output voltage | ⊿VOC | -50 | 50 | mV | 7 | ||
| Peak-to-peak driver common-mode output voltage | VOC(PP) | 0.5 | V | 7 | |||
| Positive-going receiver differential-input voltage threshold | VIT+ | -20 | mV | 7 | |||
| Negative-going receiver differential-input voltage threshold | VIT- | -220 | mV | 7 | |||
| Logic Input High Voltage D, DE, RE | VIH | 2 | V | 7 | |||
| Logic Input Low Voltage D, DE, RE | VIL | 0.8 | V | 7 | |||
| Receiver high-level output voltage | VOH | 2.4 | V | IOH= -8 mA; max printed as VCC -0.3 V | 7 | ||
| Receiver low-level output voltage | VOL | 0.4 | V | IOL= 8 mA | 7 | ||
| BUS pin input resistance | Rin | 96 | 140 | kΩ | -7V ≤ VCM ≤ +12V | 7 | |
| Driver input, driver enable and receiver enable input current | II | -5 | 5 | μA | 7 | ||
| Receiver high-impedance output current | IOZ | -1 | 1 | μA | VO = 0 V or VCC, /RE at VCC | 7 | |
| Driver short-circuit output current | /IOS/ | -250 | 250 | mA | /IOS/ with VA or VB from -7 to +12 V | 7 | |
| Bus pin A,B short current | 150 | mA | 7 | ||||
| Bus input current (driver disabled) | II | 100 | 150 | μA | VCC = 4.5 to 5.5 V or VCC = 0 V, DE at 0 V; VI= 12 V | 7 | |
| Bus input current (driver disabled) | II | -120 | -60 | μA | VCC = 4.5 to 5.5 V or VCC = 0 V, DE at 0 V; VI= -7 V | 7 | |
| Supply current (quiescent), driver and receiver enabled | ICC | 1800 | 2700 | μA | DE = VCC, /RE = GND, No LOAD | 7 | |
| Supply current (quiescent), driver enabled, receiver disabled | ICC | 500 | 800 | μA | DE = VCC, /RE = VCC, No LOAD | 7 | |
| Supply current (quiescent), driver disabled, receiver enabled | ICC | 1600 | 2100 | μA | DE = GND, /RE = GND, No LOAD | 8 | |
| Supply current (quiescent), driver and receiver disabled | ICC | 5 | 10 | μA | DE = GND, /RE = VCC, D= Vcc, No LOAD | 8 | |
| Driver differential-output rise and fall times | tr, tf | 30 | ns | RL = 54 Ω, CL=50pF, See Figure 2 | 7 | ||
| Driver propagation delay | tPHL, tPLH | 20 | 30 | ns | 7 | ||
| Driver pulse skew | tSK(P) | 2 | 7 | ns | /tPHL, tPLH/ | 7 | |
| Driver disable time | tPHZ, tPLZ | 28 | 55 | ns | Receiver enabled, See Figure 3 | 7 | |
| Driver disable time | tPHZ, tPLZ | 30 | 55 | ns | Receiver disabled, See Figure 3 | 7 | |
| Driver enable time | tPZH, tPZL | 24 | 40 | ns | Receiver enabled, See Figure 3 | 7 | |
| Driver enable time | tPZH, tPZL | 2300 | 3000 | ns | Receiver disabled, See Figure 3 | 7 | |
| Receiver output rise and fall times | tr, tf | 11 | ns | CL=15 pF, See Figure 5 | 7 | ||
| Receiver propagation delay time | tPHL, tPLH | 33 | 45 | ns | 7 | ||
| Receiver pulse skew | tSK(P) | 2.1 | 7 | ns | /tPHL, tPLH/ | 7 | |
| Receiver disable time | tPHZ, tPLZ | 30 | 55 | ns | Driver enabled, See Figure 6 | 8 | |
| Receiver enable time | tPZL, tPZH | 75 | 120 | ns | Driver enabled, See Figure 6 | 8 | |
| Receiver enable time | tPZL, tPZH | 2350 | 3000 | ns | Driver disabled, See Figure 6 | 8 | |
| Differential output capacitance | COD | 8 | pF | 7 | |||
| Receiver differential-input voltage threshold hysteresis (VIT+, VIT-) | VHYS | 60 | mV | 7 |
CAD (KiCad official)
- Symbol:
TPT481-VS1R - Footprint:
Package_SO:MSOP-8_3x3mm_P0.65mm - 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files:
tpt481-vs1r-etched.step/tpt481-vs1r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpt481-vs1r.step/tpt481-vs1r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 3PEAK datasheet (14 pp, sha256
265f729a2e430b1d, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).