main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tpt3232e-ts3r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers tpt3232e-ts3r: viewers · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 10d ago
README.md tpt3232e-ts3r: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 14d ago
tpt3232e-ts3r-etched.fit.json tpt3232e-ts3r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tpt3232e-ts3r-etched.glb tpt3232e-ts3r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tpt3232e-ts3r-etched.step tpt3232e-ts3r: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tpt3232e-ts3r.glb Publish 0.1.0 · Ray 1mo ago
tpt3232e-ts3r.kicad_mod Publish 0.1.0 · Ray 1mo ago
tpt3232e-ts3r.kicad_sym Publish 0.1.0 · Ray 1mo ago
tpt3232e-ts3r.lbr Publish 0.1.0 · Ray 1mo ago
tpt3232e-ts3r.step Publish 0.1.0 · Ray 1mo ago

TPT3232E-TS3R

3PEAK · RS232 ICs · TSSOP-16

TPT3232E-TS3R from 3PEAK, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 C1+ passive Positive lead of charge-pump flying capacitor C1. Connect the positive terminal of C1 (0.1-0.2 µF) between C1+ (pin 1) and C1- (pin 3).
2 V+ power_out Positive charge-pump output (~+2×VCC). Connect a storage capacitor C3 (0.1-0.2 µF) from V+ to GND; do not use this rail to power external circuitry.
3 C1- passive Negative lead of charge-pump flying capacitor C1. Pairs with C1+ (pin 1).
4 C2+ passive Positive lead of charge-pump flying capacitor C2. Connect C2 (0.1-0.2 µF) between C2+ (pin 4) and C2- (pin 5).
5 C2- passive Negative lead of charge-pump flying capacitor C2. Pairs with C2+ (pin 4).
6 V- power_out Negative charge-pump output (~-2×VCC, min -7 V absolute). Connect a storage capacitor C4 (0.1-0.2 µF) from V- to GND; storage-capacitor use only.
7 TOUT2 output RS-232 driver 2 output. Swings typically ±5.4 V into a 3 kΩ load with 6-30 V/µs slew rate; short-circuit current limited to ±60 mA.
8 RIN2 input RS-232 receiver 2 input. Accepts ±15 V RS-232 levels through a 3-7 kΩ input resistance with a 1.25 V typical switching threshold and 0.3 V hysteresis.
9 ROUT2 output TTL/CMOS receiver 2 output. Drives VCC/GND rails with VOL ≤ 0.3 V at -1.5 mA and VOH ≥ VCC-0.3 V at 1.5 mA.
10 TIN2 input TTL/CMOS driver 2 input. VIL ≤ 0.8 V; VIH ≥ 2.0 V (VCC=3.3 V) or ≥ 2.4 V (VCC=5.0 V). Leakage -1 to 15 µA.
11 TIN1 input TTL/CMOS driver 1 input. VIL ≤ 0.8 V; VIH ≥ 2.0 V (VCC=3.3 V) or ≥ 2.4 V (VCC=5.0 V).
12 ROUT1 output TTL/CMOS receiver 1 output. Drives VCC/GND rails with VOL ≤ 0.3 V at -1.5 mA and VOH ≥ VCC-0.3 V at 1.5 mA.
13 RIN1 input RS-232 receiver 1 input. Accepts ±15 V RS-232 levels through a 3-7 kΩ input resistance with a 1.25 V typical threshold and 0.3 V hysteresis.
14 TOUT1 output RS-232 driver 1 output. Swings typically ±5.4 V into a 3 kΩ load with 6-30 V/µs slew rate; short-circuit current limited to ±60 mA.
15 GND power_in Ground reference for VCC, logic-side pins, and the RS-232 outputs.
16 VCC power_in Supply voltage input, +3.0 V to +5.5 V (absolute max 6 V). Bypass to GND with a 0.1 µF ceramic capacitor. Supply current typically 1.2 mA no-load, up to 15 mA at max load.

Key specifications

Parameter Value
Manufacturer 3PEAK
Package TSSOP-16
Category Interface
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • TPT3232E-TS3R
  • TPT3232E-TS3RSS3R
  • TPT3232E-TS3RSO3R

CAD (KiCad official)

  • Symbol: TPT3232E-TS3R
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: tpt3232e-ts3r-etched.step / tpt3232e-ts3r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpt3232e-ts3r.step / tpt3232e-ts3r.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tpt3232e-ts3r.step 205 KB You want the bare part, or you mark your own boards.
tpt3232e-ts3r-etched.step 3.0 MB You want the part with TPT3232E-TS3R already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 736 faces against 255 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: 3PEAK datasheet (10 pp, sha256 b5563e7757b5cb9d, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF