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TPT1256-SO1R
Public Made by Adomby adom
3PEAK CAN Transceivers, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPT1256-SO1R
3PEAK · CAN Transceivers · SOP-8
TPT1256-SO1R from 3PEAK, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | CAN transmit data input (LOW for dominant, HIGH for recessive bus states); on the TPT1256 its high/low thresholds are 0.7×VIO and 0.3×VIO, and a dominant state longer than tTXD_DTO (1.2 to 3.8 ms) disables the transmitter. |
| 2 | GND | power_in | Ground reference for the transceiver. |
| 3 | VCC | power_in | Transceiver 5 V supply voltage, with a recommended operating range of 4.5 V to 5.5 V. |
| 4 | RXD | output | CAN receive data output (LOW for dominant, HIGH for recessive bus states) with VOH of 0.8×VIO at IO = −2 mA and VOL of 0.2×VIO at IO = +2 mA, and absolute output current limited to ±8 mA. |
| 5 | VIO | power_in | I/O level-shifting supply that sets the TXD, RXD and S input/output thresholds, with a recommended operating range of 3.0 V to 5.5 V (absolute maximum 7 V). |
| 6 | CANL | bidirectional | Low-level CAN bus input/output line with bus fault protection of −42 V to +42 V. |
| 7 | CANH | bidirectional | High-level CAN bus input/output line with bus fault protection of −42 V to +42 V. |
| 8 | S | input | Silent (listen-only) mode control, active high: a high level selects silent mode where the transmitter is disabled, and a low level selects normal mode. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 3PEAK |
| Package | SOP-8 |
| Category | Interface |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC 5-V Bus Supply Voltage Range | VCC | -0.3 | 7 | V | 6 | ||
| VIO I/O Level-Shifting Voltage Range | VIO | -0.3 | 7 | V | 6 | ||
| CAN Bus I/O Voltage Range (CANH, CANL) | VBUS | -42 | 42 | V | 6 | ||
| Logic Input Terminal Voltage Range (TXD, S) | V(Logic_Input) | -0.3 | 7 | V | 6 | ||
| Logic Output Terminal Voltage Range (RXD) | V(Logic_Output) | -0.3 | 7 | V | 6 | ||
| RXD (Receiver) Output Current | IO_RXD | -8 | 8 | mA | 6 | ||
| Maximum Junction Temperature | TJ | -40 | 150 | °C | 6 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 6 | ||
| VIO Input/output voltage, TXD, RXD, S of TPT1256 | VIO | 3 | 5.5 | V | 7 | ||
| VCC Power Supply | VCC | 4.5 | 5.5 | V | 7 | ||
| RXD Terminal High-Level Output Current | IOH(RXD) | -2 | mA | 7 | |||
| RXD Terminal Low-Level Output Current | IOL(RXD) | 2 | mA | 7 | |||
| Operating Ambient Temperature | TA | -40 | 125 | °C | 7 | ||
| ICC Normal Mode (dominant), RL = 60 Ω | ICC | 50 | 70 | mA | TXD = 0 V, RL = 60 Ω, CL = open, RCM = open, S = 0 V | 8 | |
| ICC Normal Mode (dominant), RL = 50 Ω | ICC | 52 | 80 | mA | TXD = 0 V, RL = 50 Ω, CL = open, RCM = open, S = 0 V | 8 | |
| ICC Normal Mode (dominant, bus fault) | ICC | 73 | 150 | mA | TXD = 0 V, S = 0 V, CANH = CANL = -3 /+18V, RL = open, CL = open, RCM = open | 8 | |
| ICC Normal Mode (recessive) | ICC | 1.2 | 2.5 | mA | TXD = VIO, RL = 50 Ω, CL = open, RCM = open, S = 0 V | 8 | |
| ICC Silent Mode | ICC | 1.2 | 2.5 | mA | TXD = VIO, RL = 50 Ω, CL = open, RCM = open, S = VCC | 8 | |
| IIO Normal and Silent Modes | IIO | 73 | 200 | µA | RXD Floating, TXD = S = 0 or VIO | 8 | |
| Rising Undervoltage Detection on VCC for Protected Mode | UVVCC | 4 | 4.4 | V | 8 | ||
| Falling Undervoltage Detection on VCC for Protected Mode | UVVCC | 3.6 | 3.9 | 4.2 | V | 8 | |
| Undervoltage Detection on VIO for Protected Mode | UVVIO | 1.3 | 2.75 | V | VIH and VIL | 8 | |
| Pin-S High-Level Input Leakage Current | IIH | 30 | µA | S = VCC or VIO = 5.5 V | 8 | ||
| Pin-S Low-Level Input Leakage Current | IIL | -1 | 0 | 1 | µA | S = 0 V, VCC = VIO = 5.5 V | 8 |
| Pin-S Unpowered Leakage Current | Ilkg(OFF) | -1 | 0 | 1 | µA | S = 5.5 V, VCC = VIO = 0 V | 8 |
| Pin-TXD High-Level Input Leakage Current | IIH | -2.5 | 0 | 1 | µA | S = VCC or VIO = 5.5 V | 9 |
| Pin-TXD Low-Level Input Leakage Current | IIL | -100 | -63 | -7 | µA | S = 0 V, VCC = VIO = 5.5 V | 9 |
| Pin-TXD Unpowered Leakage Current | Ilkg(OFF) | -1 | 0 | 1 | µA | TXD = 5.5 V, VCC = VIO = 0 V | 9 |
| Pin-RXD Unpowered Leakage Current | Ilkg(OFF) | -1 | 0 | 1 | µA | RXD = 5.5 V, VCC = 0 V, VIO = 0 V | 9 |
| Bus Output Voltage (dominant) CANH | VO(DOM) | 2.75 | 4.5 | V | TXD = 0 V, S = 0 V, 45 Ω ≤ RL ≤ 65 Ω, CL = open, RCM = open | 9 | |
| Bus Output Voltage (dominant) CANL | VO(DOM) | 0.5 | 2.25 | V | TXD = 0 V, S = 0 V, 45 Ω ≤ RL ≤ 65 Ω, CL = open, RCM = open | 9 | |
| Bus Output Voltage (recessive) | VO(REC) | 2 | 3 | V | TXD = VCC, VIO = VCC, S = VCC or 0 V(2), RL = open (no load), RCM = open | 9 | |
| Differential Output Voltage (dominant), 45 Ω ≤ RL < 50 Ω | VOD(DOM) | 1.4 | 3 | V | TXD = 0 V, S = 0 V, 45 Ω ≤ RL < 50 Ω, CL = open, RCM = open | 9 | |
| Differential Output Voltage (dominant), 50 Ω ≤ RL ≤ 65 Ω | VOD(DOM) | 1.5 | 3 | V | TXD = 0 V, S = 0 V, 50 Ω ≤ RL ≤ 65 Ω, CL = open, RCM = open | 9 | |
| Differential Output Voltage (dominant), RL = 2240 Ω | VOD(DOM) | 1.5 | 5 | V | TXD = 0 V, S = 0 V, RL = 2240 Ω, CL = open, RCM = open, VCC = 4.5 V~5.25 V | 9 | |
| Differential Output Voltage (recessive), RL = 60 Ω | VOD(REC) | -120 | 12 | mV | TXD = VCC, S = 0 V, RL = 60 Ω, CL = open, RCM = open | 9 | |
| Differential Output Voltage (recessive), RL = open (no load) | VOD(REC) | -50 | 50 | mV | TXD = VCC, S = 0 V, RL = open (no load), CL = open, RCM = open | 9 | |
| DC Output Symmetry (dominant or recessive) | VSYM_DC | -0.4 | 0.4 | V | S = 0 V, RL = 60 Ω, CL = open, RCM = open | 10 | |
| Short-circuit Steady-State Output Current, dominant (CANH) | IOS(SS_DOM) | -100 | mA | S at 0 V, VCANH = -5 V to 40 V, CANL = open, TXD = 0 V | 10 | ||
| Short-circuit Steady-State Output Current, dominant (CANL) | IOS(SS_DOM) | 100 | mA | S at 0 V, VCANL = -5 V to 40 V, CANH = open, TXD = 0 V | 10 | ||
| Short-circuit Steady-State Output Current, recessive | IOS(SS_REC) | -5 | 5 | mA | -27 V ≤ VBUS ≤ 32 V, VBUS = CANH = CANL, TXD = VCC | 10 | |
| Common Mode Range, normal mode | VCM | -30 | 30 | V | S = 0 or VCC or VIO | 10 | |
| Positive-going Input Threshold Voltage, all modes (first set) | VIT+ | 900 | mV | S = 0 or VCC or VIO | 10 | ||
| Negative-going Input Threshold Voltage, all modes (−20 V to +20 V) | VIT- | 500 | mV | −20 V ≤ VCM ≤ +20 V | 10 | ||
| Positive-going Input Threshold Voltage, all modes (second set) | VIT+ | 1000 | mV | S = 0 or VCC or VIO | 10 | ||
| Negative-going Input Threshold Voltage, all modes (−30 V to +30 V) | VIT- | 400 | mV | −30 V ≤ VCM ≤ +30 V | 10 | ||
| Power-off (unpowered) Bus Input Leakage Current | Ilkg(IOFF) | 3 | µA | CANH = CANL = 5 V, VCC = VIO = 0 V | 10 | ||
| Differential Input Resistance | RID | 30 | 80 | kΩ | TXD = VCC = VIO = 5 V | 10 | |
| Input Resistance (CANH or CANL) | RIN | 15 | 40 | kΩ | S = 0 V, −30 V ≤ VCM ≤ +30 V | 10 | |
| Input Resistance Matching | RIN(M) | -1 | 1 | % | VCANH = VCANL = 5 V | 10 | |
| Total loop delay, TXD to RXD, recessive to dominant | tPROP(LOOP1) | 100 | 160 | ns | S = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF | 11 | |
| Total loop delay, TXD to RXD, dominant to recessive | tPROP(LOOP2) | 110 | 175 | ns | 11 | ||
| Mode change time, Normal to Silent or Silent to Normal | tMODE | 0.15 | 10 | µs | 11 | ||
| Dominant timeout | tTXD_DTO | 1.2 | 3.8 | ms | S = 0 V, RL = 60 Ω, CL = open | 11 | |
| Bit time on CAN bus output pins with tBIT(TXD) = 500 ns, all devices | tBIT(BUS) | 435 | 530 | ns | tBIT(TXD) = 500 ns, all devices; S = 0 V, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF | 11 | |
| Bit time on RXD output pins with tBIT(TXD) = 500 ns, all devices | tBIT(RXD) | 400 | 550 | ns | tBIT(TXD) = 500 ns, all devices | 12 | |
| Receiver timing symmetry with tBIT(TXD) = 500 ns, all devices | ΔtREC | -65 | 40 | ns | tBIT(TXD) = 500 ns, all devices | 12 | |
| Thermal resistance junction-to-ambient, SOP8 | θJA | 118 | °C/W | 7 | |||
| Thermal resistance junction-to-case, SOP8 | θJC | 48 | °C/W | 7 | |||
| Hysteresis Voltage (VIT+ − VIT-) | VHYS | 120 | mV | S = 0 or VCC or VIO | 10 |
CAD (KiCad official)
- Symbol:
TPT1256-SO1R - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
tpt1256-so1r-etched.step/tpt1256-so1r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpt1256-so1r.step/tpt1256-so1r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 3PEAK datasheet (20 pp, sha256
febe9542a5a5db47, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).