# TPSM712

**TECH PUBLIC** · ESD And Surge Protection (TVS/ESD) · SOT-23

TPSM712 from TECH PUBLIC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O 1 | passive | I/O protection line 1; 12V TVS from pin 1 to GND (pin 3) with VRWM 12V max, VBR 13.3V min at 1mA, and 7V TVS in the reverse direction (GND to pin 1). |
| 2 | I/O 2 | passive | I/O protection line 2; 12V TVS from pin 2 to GND (pin 3) with VRWM 12V max, VBR 13.3V min at 1mA, and 7V TVS in the reverse direction (GND to pin 2). |
| 3 | GND | power_in | Common ground/cathode reference shared by both protection channels; the 7V direction (pin 3 to pins 1 and 2) has VRWM 7V max and VBR 7.5V min at 1mA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-23 |
| Category | Circuit Protection |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `TPSM712`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `tpsm712-etched.step` / `tpsm712-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpsm712.step` / `tpsm712.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588905254154326016) (4 pp, sha256 `5f7715f37cfbf58d`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tpsm712-datasheet.pdf)