component
TPSL15T1G
Public Made by Adomby adom
TECH PUBLIC ESD And Surge Protection (TVS/ESD), SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPSL15T1G
TECH PUBLIC · ESD And Surge Protection (TVS/ESD) · SOT-23
TPSL15T1G from TECH PUBLIC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Protected line terminal (TVS cathode side); 15V max reverse working voltage, 16-19V breakdown at 1mA, 35V max clamping at 8A (8/20µs), 1pF typical capacitance to pin 2. |
| 2 | 2 | passive | Second diode-array terminal (anode side, typically ground reference) paired with pin 1; ±30kV ESD per IEC 61000-4-2, 300W peak pulse power (8/20µs). |
| 3 | NC | unconnected | Not connected (N.C.) as marked on the pin configuration diagram. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-23 |
| Category | Circuit Protection |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
TPSL15T1G - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
tpsl15t1g-etched.step/tpsl15t1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpsl15t1g.step/tpsl15t1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TECH PUBLIC datasheet (4 pp, sha256
d56c05d25d04bcf4, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPSL15T1G
**TECH PUBLIC** · ESD And Surge Protection (TVS/ESD) · SOT-23
TPSL15T1G from TECH PUBLIC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Protected line terminal (TVS cathode side); 15V max reverse working voltage, 16-19V breakdown at 1mA, 35V max clamping at 8A (8/20µs), 1pF typical capacitance to pin 2. |
| 2 | 2 | passive | Second diode-array terminal (anode side, typically ground reference) paired with pin 1; ±30kV ESD per IEC 61000-4-2, 300W peak pulse power (8/20µs). |
| 3 | NC | unconnected | Not connected (N.C.) as marked on the pin configuration diagram. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-23 |
| Category | Circuit Protection |
| Pins | 3 |
## CAD (KiCad official)
- Symbol: `TPSL15T1G`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `tpsl15t1g-etched.step` / `tpsl15t1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpsl15t1g.step` / `tpsl15t1g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590931181489897472) (4 pp, sha256 `d56c05d25d04bcf4`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tpsl15t1g-datasheet.pdf)