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Contents

README

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TPS92633QPWPRQ1

Texas Instruments · LED Drivers · TSSOP-20-EP

TPS92633QPWPRQ1 from Texas Instruments, in a TSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SUPPLY power_in Device power supply pin.
2 EN input Device enable pin.
3 IN1 input Current input for channel 1.
4 IN2 input Current input for channel 2.
5 IN3 input Current input for channel 3.
6 DIAGEN input Enable pin for LED open-circuit detection and single LED short detection, used to avoid false open and single LED short diagnostics during low-dropout operation.
7 PWM1 input PWM input for OUT1 and RES1 current output ON/OFF control.
8 PWM2 input PWM input for OUT2 and RES2 current output ON/OFF control.
9 PWM3 input PWM input for OUT3 and RES3 current output ON/OFF control.
10 FAULT bidirectional Fault output that supports a one-fails-all-fail fault bus.
11 ICTRL output Resistor-programmable voltage reference pin for an LED binning resistor or NTC resistor.
12 SLS_REF output Resistor-programmable voltage reference pin for the single LED short threshold.
13 IREF output Current reference pin; a 12.3-kΩ resistor is recommended between IREF and ground.
14 GND power_in Ground.
15 OUT3 output Current output for channel 3; a 10-nF capacitor is recommended between the pin and GND.
16 RES3 output Current output for channel 3 with external thermal resistor.
17 OUT2 output Current output for channel 2; a 10-nF capacitor is recommended between the pin and GND.
18 RES2 output Current output for channel 2 with external thermal resistor.
19 OUT1 output Current output for channel 1; a 10-nF capacitor is recommended between the pin and GND.
20 RES1 output Current output for channel 1 with external thermal resistor.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20-EP
Category LED Drivers
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (absolute maximum) -0.3 45 V 4
High-voltage input (DIAGEN, IN1, IN2, IN3, EN, PWM1, PWM2, PWM3) -0.3 V max printed as V(SUPPLY)+0.3 V, not a fixed number 4
High-voltage output (OUT1, OUT2, OUT3, RES1, RES2, RES3, ICTRL) -0.3 V max printed as V(SUPPLY)+0.3 V, not a fixed number 4
Fault bus (FAULT) -0.3 V max printed as V(SUPPLY)+0.3 V, not a fixed number 4
Low-voltage pin (SLS_REF, IREF) -0.3 5.5 V 4
Operating junction temperature TJ -40 150 °C 4
Storage temperature Tstg -40 150 °C 4
Device supply voltage 4.5 40 V 4
EN device EN pin 0 V max printed as V(SUPPLY) 4
PWM inputs (PWM1, PWM2, PWM3) 0 V max printed as V(SUPPLY) 4
Diagnostics enable pin (DIAGEN) 0 V max printed as V(SUPPLY) 4
Output current control (ICTRL) 0 2.75 V 4
Single-LED short-circuit reference (SLS_REF) 0 3.5 V 4
Current reference (IREF) 50 250 µA 4
Operating ambient temperature TA -40 125 °C 4
Device standby ground current I(Quiescent) 1.5 2.5 mA PWM = HIGH 5
Supply voltage POR rising threshold V(POR_rising) 3.6 4 V 5
Supply voltage POR falling threshold V(POR_falling) 3 3.4 V 5
Device shutdown current I(SD) 14 26 µA V(EN) = 0 V 5
Device supply current in fault mode I(Fault) 0.21 0.33 0.45 mA PWM = HIGH, FAULT externally pulled LOW 5
Input logic-low voltage, EN VIL(EN) 0.7 V 5
Input logic-high voltage, EN VIH(EN) 2 V 5
EN pulldown current I(EN_pulldown) 1.5 3.3 4.5 µA V(EN) = 12 V 5
Input logic-low voltage, DIAGEN VIL(DIAGEN) 1.045 1.1 1.155 V 5
Input logic-high voltage, DIAGEN VIH(DIAGEN) 1.14 1.2 1.26 V 5
Input logic-low voltage, PWM VIL(PWM) 1.045 1.1 1.155 V 5
Input logic-high voltage, PWM VIH(PWM) 1.14 1.2 1.26 V 5
Device output-current for each channel I(OUTx_Tot) 5 150 mA 100% duty cycle 5
Sense-resistor regulation voltage V(CS_REG) 46 50 54 mV TA = -40°C to +125°C, ICTRL ground 5
Sense-resistor regulation voltage V(CS_REG) 95 100 105 mV TA = -40°C to +125°C, V(ICTRL) = 0.68 V 5
Sense-resistor regulation voltage V(CS_REG) 192 200 208 mV TA = -40°C to +125°C, V(ICTRL) = 1.365 V 5
Sense-resistor regulation voltage V(CS_REG) 384 400 416 mV TA = -40°C to +125°C, V(ICTRL) = 2.75 V 5
Channel to channel mismatch ΔV(CS_c2c) -3 3 % ΔV(CS_c2c) = 1, V(CS_REGx)/Vavg(CS_REG), V(ICTRL) = 0.68 V 5
Device to device mismatch ΔV(CS_d2d) -4 4 % ΔV(CS_d2d) = 1, Vavg(CS_REG)/Vnom(CS_REG), V(ICTRL) = 0.68 V 5
Sense-resistor range R(CS_REG) 0.65 20 Ω 5
Voltage dropout from INx to OUTx, RESx open V(DROPOUT) 200 400 mV current setting of 100 mA 5
Voltage dropout from INx to OUTx, RESx open V(DROPOUT) 300 600 mV current setting of 150 mA 5
Voltage dropout from INx to RESx, OUTx open V(DROPOUT) 280 600 mV current setting of 100 mA 5
Voltage dropout from INx to RESx, OUTx open V(DROPOUT) 400 900 mV current setting of 150 mA 5
Ratio of RESx current to total current I(RESx) 95 % I(RESx)/I(OUTx_Tot), V(INx), V(RESx) > 1 V 6
ICTRL current output ratio N(ICTRL) 9.7 10 10.3 I(ICTRL)/I(IREF) 6
LED open rising threshold V(OPEN_th_rising) 180 300 420 mV V(IN), V(OUT) 6
Channel output short-to-ground rising threshold V(SG_th_rising) 1.14 1.2 1.26 V 6
Channel output short-to-ground falling threshold V(SG_th_falling) 0.855 0.9 0.945 V 6
SLS_REF current output ratio N(SLS_REF) 0.97 1 1.03 I(SLS_REF)/I(IREF) 6
OUT voltage attenuation ratio N(OUT) 3.84 4 4.16 V(OUT) = 3 to 14 V 6
Channel output V(OUT) short-to-ground retry current I(Retry) 0.64 1.08 1.528 mA 6
Logic input low threshold (FAULT) VIL(FAULT) 0.7 V 6
Logic input high threshold (FAULT) VIH(FAULT) 2 V 6
FAULT internal pulldown current I(FAULT_pulldown) 2 3 4 mA V(FAULT) = 0.4 V 6
FAULT internal pullup current I(FAULT_pullup) 6 10 14 µA 6
FAULT leakage current I(FAULT_leakage) 1 2 µA V(FAULT) = 40 V 6
Thermal shutdown junction temperature threshold T(TSD) 157 172 187 °C 6
Junction-to-ambient thermal resistance RθJA 40.1 °C/W 4
Junction-to-case (top) thermal resistance RθJC(top) 34 °C/W 4
Junction-to-board thermal resistance RθJB 18.3 °C/W 5
Junction-to-case (bottom) thermal resistance RθJC(bot) 5.6 °C/W 5

CAD (KiCad official)

  • Symbol: TPS92633QPWPRQ1
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: TSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tps92633qpwprq1-etched.step / tps92633qpwprq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps92633qpwprq1.step / tps92633qpwprq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (51 pp, sha256 1e4a6d2dda64c614, retrieved 2026-10-20, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF